TY - GEN
T1 - Measurement of SRAM power-up state for PUF applications using an addressable SRAM cell array test structure
AU - Takeuchi, Kiyoshi
AU - Mizutani, Tomoko
AU - Saraya, Takuya
AU - Kobayashi, Masaharu
AU - Hiramoto, Toshiro
AU - Shinohara, Hirofumi
N1 - Publisher Copyright:
© 2016 IEEE.
Copyright:
Copyright 2016 Elsevier B.V., All rights reserved.
PY - 2016/5/20
Y1 - 2016/5/20
N2 - SRAM data just after power-up were measured using an addressable SRAM cell array test structure. It was found that the results are strongly affected by the address switching noise and memory effect. An addressing sequence combined with word line reset pulse application is proposed for reliable power-up data stability evaluation.
AB - SRAM data just after power-up were measured using an addressable SRAM cell array test structure. It was found that the results are strongly affected by the address switching noise and memory effect. An addressing sequence combined with word line reset pulse application is proposed for reliable power-up data stability evaluation.
KW - SRAM
KW - physical unclonable function
KW - test structure
UR - http://www.scopus.com/inward/record.url?scp=84974588605&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84974588605&partnerID=8YFLogxK
U2 - 10.1109/ICMTS.2016.7476191
DO - 10.1109/ICMTS.2016.7476191
M3 - Conference contribution
AN - SCOPUS:84974588605
T3 - IEEE International Conference on Microelectronic Test Structures
SP - 130
EP - 134
BT - 2016 29th IEEE International Conference on Microelectronic Test Structures, ICMTS 2016 - Conference Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 29th IEEE International Conference on Microelectronic Test Structures, ICMTS 2016
Y2 - 28 March 2016 through 31 March 2016
ER -