Near fine grain parallel processing of circuit simulation using direct method

Y. Maekawa*, K. Nakano, M. Takai, H. Kasahara

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

Abstract

This paper proposes a parallel processing scheme of electronic circuit simulation using direct method and evaluates performance of the scheme on a multiprocessor system named OSCAR (Optimally SCheduled Advanced MultiprocessoR) with centralized shared memory, distributed shared memory and local memory. A special purpose compiler is used to realize efficient near fine grain parallel processing of circuit simulation on an actual multiprocessor system. The compiler automatically generates a circuit simulation program from SPICE format input data. The compiler decomposes the program into tasks, analyzes data dependencies among tasks, schedules the tasks and generates optimized parallel machine code. In the parallel machine code generation process, a different machine code for each processor, which consists of task codes, data transfer codes and synchronization codes, is generated by using static scheduling result.

Original languageEnglish
Pages272-276
Number of pages5
Publication statusPublished - 1995
EventProceedings of the 1995 IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Victoria, BC, Can
Duration: 1995 May 171995 May 19

Other

OtherProceedings of the 1995 IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing
CityVictoria, BC, Can
Period95/5/1795/5/19

ASJC Scopus subject areas

  • Signal Processing
  • Computer Networks and Communications

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