Abstract
This paper proposes a parallel processing scheme of electronic circuit simulation using direct method and evaluates performance of the scheme on a multiprocessor system named OSCAR (Optimally SCheduled Advanced MultiprocessoR) with centralized shared memory, distributed shared memory and local memory. A special purpose compiler is used to realize efficient near fine grain parallel processing of circuit simulation on an actual multiprocessor system. The compiler automatically generates a circuit simulation program from SPICE format input data. The compiler decomposes the program into tasks, analyzes data dependencies among tasks, schedules the tasks and generates optimized parallel machine code. In the parallel machine code generation process, a different machine code for each processor, which consists of task codes, data transfer codes and synchronization codes, is generated by using static scheduling result.
Original language | English |
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Pages | 272-276 |
Number of pages | 5 |
Publication status | Published - 1995 |
Event | Proceedings of the 1995 IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing - Victoria, BC, Can Duration: 1995 May 17 → 1995 May 19 |
Other
Other | Proceedings of the 1995 IEEE Pacific RIM Conference on Communications, Computers, and Signal Processing |
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City | Victoria, BC, Can |
Period | 95/5/17 → 95/5/19 |
ASJC Scopus subject areas
- Signal Processing
- Computer Networks and Communications