New power-aware placement for region-based FPGA architecture combined with dynamic power gating by PCHM

Ce Li; Yiping Dong; Takahiro Watanabe

doi:10.1109/ISLPED.2011.5993640

New power-aware placement for region-based FPGA architecture combined with dynamic power gating by PCHM

Ce Li^*, Yiping Dong, Takahiro Watanabe

^*Corresponding author for this work

Graduate School of Information, Production and Systems

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

10 Citations (Scopus)

Abstract

The power consumption of FPGA is larger than that of ASIC to perform the same function in the same scaling. In this paper, we propose a Power Control Hard Macro (PCHM) based coarse-grained power gating FPGA architecture to dynamically reduce the power consumption. The algorithm of the placement based on sleep region is presented. After enhancing the CAD framework, a detailed study is given under different region size supported by the new FPGA architecture. As a result, the proposed architecture and the placement algorithm can reduce 51% power consumption on average compared with normal architecture.

Original language	English
Title of host publication	IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2011
Pages	223-228
Number of pages	6
DOIs	https://doi.org/10.1109/ISLPED.2011.5993640
Publication status	Published - 2011 Sept 19
Event	17th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2011 - Fukuoka, Japan Duration: 2011 Aug 1 → 2011 Aug 3

Publication series

Name	Proceedings of the International Symposium on Low Power Electronics and Design
ISSN (Print)	1533-4678

Other

Other	17th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2011
Country/Territory	Japan
City	Fukuoka
Period	11/8/1 → 11/8/3

ASJC Scopus subject areas

Engineering(all)

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10.1109/ISLPED.2011.5993640

Cite this

Li, C., Dong, Y., & Watanabe, T. (2011). New power-aware placement for region-based FPGA architecture combined with dynamic power gating by PCHM. In IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2011 (pp. 223-228). Article 5993640 (Proceedings of the International Symposium on Low Power Electronics and Design). https://doi.org/10.1109/ISLPED.2011.5993640

New power-aware placement for region-based FPGA architecture combined with dynamic power gating by PCHM. / Li, Ce; Dong, Yiping; Watanabe, Takahiro.
IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2011. 2011. p. 223-228 5993640 (Proceedings of the International Symposium on Low Power Electronics and Design).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Li, C, Dong, Y & Watanabe, T 2011, New power-aware placement for region-based FPGA architecture combined with dynamic power gating by PCHM. in IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2011., 5993640, Proceedings of the International Symposium on Low Power Electronics and Design, pp. 223-228, 17th IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2011, Fukuoka, Japan, 11/8/1. https://doi.org/10.1109/ISLPED.2011.5993640

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New power-aware placement for region-based FPGA architecture combined with dynamic power gating by PCHM

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