Novel polysilicon source/drain transistor with self-aligned silicidation.

M. Shimizu; M. Inuishi; H. Miyatake; H. Morita; K. Tsukamoto; Y. Akasaka

Novel polysilicon source/drain transistor with self-aligned silicidation.

M. Shimizu^*, M. Inuishi, H. Miyatake, H. Morita, K. Tsukamoto, Y. Akasaka

^*Corresponding author for this work

Research output: Contribution to journal › Conference article › peer-review

1 Citation (Scopus)

Abstract

A poly-Si S/D transistor with self-aligned titanium silicidation has been developed without a sidewall spacer. It has excellent electrical characteristics and the transistor performance is improved by the reduction of poly-Si resistance. The effects of etching damage of the active channel regions on the transistor characteristics are investigated. It is concluded that the etching damage is removed by sacrifice oxidation of 20 nm.

Original language	English
Pages (from-to)	11-12
Number of pages	2
Journal	Digest of Technical Papers - Symposium on VLSI Technology
Publication status	Published - 1988 Dec 1
Externally published	Yes

ASJC Scopus subject areas

Electrical and Electronic Engineering

Cite this

@article{462673d0236e4403bc28014e3fe2249c,

title = "Novel polysilicon source/drain transistor with self-aligned silicidation.",

abstract = "A poly-Si S/D transistor with self-aligned titanium silicidation has been developed without a sidewall spacer. It has excellent electrical characteristics and the transistor performance is improved by the reduction of poly-Si resistance. The effects of etching damage of the active channel regions on the transistor characteristics are investigated. It is concluded that the etching damage is removed by sacrifice oxidation of 20 nm.",

author = "M. Shimizu and M. Inuishi and H. Miyatake and H. Morita and K. Tsukamoto and Y. Akasaka",

year = "1988",

month = dec,

day = "1",

language = "English",

pages = "11--12",

journal = "Digest of Technical Papers - Symposium on VLSI Technology",

issn = "0743-1562",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - JOUR

T1 - Novel polysilicon source/drain transistor with self-aligned silicidation.

AU - Shimizu, M.

AU - Inuishi, M.

AU - Miyatake, H.

AU - Morita, H.

AU - Tsukamoto, K.

AU - Akasaka, Y.

PY - 1988/12/1

Y1 - 1988/12/1

N2 - A poly-Si S/D transistor with self-aligned titanium silicidation has been developed without a sidewall spacer. It has excellent electrical characteristics and the transistor performance is improved by the reduction of poly-Si resistance. The effects of etching damage of the active channel regions on the transistor characteristics are investigated. It is concluded that the etching damage is removed by sacrifice oxidation of 20 nm.

AB - A poly-Si S/D transistor with self-aligned titanium silicidation has been developed without a sidewall spacer. It has excellent electrical characteristics and the transistor performance is improved by the reduction of poly-Si resistance. The effects of etching damage of the active channel regions on the transistor characteristics are investigated. It is concluded that the etching damage is removed by sacrifice oxidation of 20 nm.

UR - http://www.scopus.com/inward/record.url?scp=0024136001&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0024136001&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:0024136001

SN - 0743-1562

SP - 11

EP - 12

JO - Digest of Technical Papers - Symposium on VLSI Technology

JF - Digest of Technical Papers - Symposium on VLSI Technology

ER -

Novel polysilicon source/drain transistor with self-aligned silicidation.

Abstract

ASJC Scopus subject areas

Other files and links

Fingerprint

Cite this