Novel polysilicon source/drain transistor with self-aligned silicidation.

M. Shimizu*, M. Inuishi, H. Miyatake, H. Morita, K. Tsukamoto, Y. Akasaka

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

1 Citation (Scopus)


A poly-Si S/D transistor with self-aligned titanium silicidation has been developed without a sidewall spacer. It has excellent electrical characteristics and the transistor performance is improved by the reduction of poly-Si resistance. The effects of etching damage of the active channel regions on the transistor characteristics are investigated. It is concluded that the etching damage is removed by sacrifice oxidation of 20 nm.

Original languageEnglish
Pages (from-to)11-12
Number of pages2
JournalDigest of Technical Papers - Symposium on VLSI Technology
Publication statusPublished - 1988 Dec 1
Externally publishedYes

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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