Abstract
Dual-vdd has been proposed to optimize the power of circuits without violating the performance. In this paper, different from traditional methods which focus on making full use of slacks of non-critical gates, an efficient min-cut based voltage assignment algorithm concentrating on critical gates is proposed. And then this algorithm is integrated into a searching engine to auto-select rational voltages for dual-vdd system. Experimental results show that our search engine can always achieve good pair of dual-vdd, and our min-cut based algorithm outperformed previous works for voltage assignment both on power consumption and runtime.
Original language | English |
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Pages (from-to) | 2208-2219 |
Number of pages | 12 |
Journal | IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences |
Volume | E95-A |
Issue number | 12 |
DOIs | |
Publication status | Published - 2012 Dec |
Keywords
- Dual-vdd
- Low power
- Min-cut
- Timing constraints
- Voltage assignment
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Computer Graphics and Computer-Aided Design
- Applied Mathematics
- Signal Processing