TY - GEN
T1 - Numerical simulation of transient heat conduction in nanoscale Si devices
AU - Kamakura, Yoshinari
AU - Zushi, Tomofumi
AU - Watanabe, Takanobu
AU - Mori, Nobuya
AU - Taniguchi, Kenji
PY - 2010/12/1
Y1 - 2010/12/1
N2 - Two numerical simulation techniques are presented to investigate the heating issues in nanoscale Si devices. The first one is the Monte Carlo simulation for both electron and phonon transport, and the transient electrothermal analysis is carrier out in n+-n-n+ device with the n-layer length of 10 nm. The second is the molecular dynamics approach for simulating the atomic thermal vibration in the nanoscale Si/SiO2 systems. It is shown that the lattice temperature at the drain edge is raised by the hot electron injection from the source after turning on the device, and the impact of this phenomenon becomes more significant in the smaller devices due to the worse heat conductivity.
AB - Two numerical simulation techniques are presented to investigate the heating issues in nanoscale Si devices. The first one is the Monte Carlo simulation for both electron and phonon transport, and the transient electrothermal analysis is carrier out in n+-n-n+ device with the n-layer length of 10 nm. The second is the molecular dynamics approach for simulating the atomic thermal vibration in the nanoscale Si/SiO2 systems. It is shown that the lattice temperature at the drain edge is raised by the hot electron injection from the source after turning on the device, and the impact of this phenomenon becomes more significant in the smaller devices due to the worse heat conductivity.
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U2 - 10.1109/ICSICT.2010.5667342
DO - 10.1109/ICSICT.2010.5667342
M3 - Conference contribution
AN - SCOPUS:78751503288
SN - 9781424457984
T3 - ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings
SP - 1745
EP - 1748
BT - ICSICT-2010 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Proceedings
T2 - 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology
Y2 - 1 November 2010 through 4 November 2010
ER -