Abstract
A one-transistor memory cell on silicon-on-insulator, called floating-body cell (FBC), has been developed and demonstrated. Threshold voltage difference between the "0"-state and the "1"-state, which is a key parameter for realizing a large-scale memory by FBCs, is measured and analyzed using a 96 kb array diagnostic monitor (ADM). A function test of the ADM yielded a fail-bit probability of 0.002%. A new metric relating to the fail-bit probability, that is, the ratio of the threshold voltage difference over the total threshold voltage variation, is introduced and applied to the measurement results. Read current distributions are also evaluated for various operation voltages. This paper also investigates substrate bias dependence of the threshold voltage unique to fully-depleted devices. Channel impurity and substrate impurity concentration dependence of the threshold voltage are analyzed based on experimental data and device simulation.
Original language | English |
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Pages (from-to) | 2220-2225 |
Number of pages | 6 |
Journal | IEEE Transactions on Electron Devices |
Volume | 52 |
Issue number | 10 |
DOIs | |
Publication status | Published - 2005 Oct |
Externally published | Yes |
Keywords
- Distribution
- MOSFETs
- Random access memories
- Silicon-on-insulator (SOI) technology
- Threshold voltage
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering