Optimum design of gate/N- overlapped LDD transistor

M. Inuishi*, K. Mitsui, S. Komori, M. Shimizu, H. Oda, J. Mitsuhashi, K. Tsukamoto

*Corresponding author for this work

Research output: Contribution to journalConference articlepeer-review

11 Citations (Scopus)

Abstract

The authors present the optimum design and fabrication of the overlapped LDD (lightly doped drain) NMOS transistor. They use simulation to clarify the internal state of the overlapped LDD transistor under operation, evaluate the improved electrical characteristics of devices fabricated by rotational oblique N- implantation, and show that the optimum design overlapped LDD can surpass the conventional LDD in device characteristics and circuit speed. They also show that oblique implantation is a promising method for forming the gate/N- overlapped structures due to the simple control of the N- region in terms of implantation angle and energy.

Original languageEnglish
Pages (from-to)33-34
Number of pages2
JournalDigest of Technical Papers - Symposium on VLSI Technology
Publication statusPublished - 1989 Dec 1
Externally publishedYes
EventNinth Symposium on VLSI Technology 1989 - Digest of Technical Papers - Kyoto, Jpn
Duration: 1989 May 221989 May 25

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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