TY - GEN
T1 - OSCAR compiler controlled multicore power reduction on android platform
AU - Yamamoto, Hideo
AU - Hirano, Tomohiro
AU - Muto, Kohei
AU - Mikami, Hiroki
AU - Goto, Takashi
AU - Hillenbrand, Dominic
AU - Takamura, Moriyuki
AU - Kimura, Keiji
AU - Kasahara, Hironori
N1 - Publisher Copyright:
© Springer International Publishing Switzerland 2014.
PY - 2014
Y1 - 2014
N2 - In recent years, smart devices are transitioning from single core processors to multicore processors to satisfy the growing demands of higher performance and lower power consumption. However, power consumption of multicore processors is increasing, as usage of smart devices become more intense. This situation is one of the most fundamental and important obstacle that the mobile device industries face, to extend the battery life of smart devices. This paper evaluates the power reduction control by the OSCAR Automatic Parallelizing Compiler on an Android platform with the newly developed precise power measurement environment on the ODROID-X2, a development platform with the Samsung Exynos4412 Prime, which consists of 4 ARM Cortex-A9 cores. The OSCAR Compiler enables automatic exploitation of multigrain parallelism within a sequential program, and automatically generates a parallelized code with the OSCAR Multi-Platform API power reduction directives for the purpose of DVFS (Dynamic Voltage and Frequency Scaling), clock gating, and power gating. The paper also introduces a newly developed micro second order pseudo clock gating method to reduce power consumption using WFI (Wait For Interrupt). By inserting GPIO (General Purpose Input Output) control functions into programs, signals appear on the power waveform indicating the point of where the GPIO control was inserted and provides a precise power measurement of the specified program area. The results of the power evaluation for realtime Mpeg2 Decoder show 86.7% power reduction, namely from 2.79[W] to 0.37[W] and for real-time Optical Flow show 86.5% power reduction, namely from 2.23[W] to 0.36[W] on 3 core execution.
AB - In recent years, smart devices are transitioning from single core processors to multicore processors to satisfy the growing demands of higher performance and lower power consumption. However, power consumption of multicore processors is increasing, as usage of smart devices become more intense. This situation is one of the most fundamental and important obstacle that the mobile device industries face, to extend the battery life of smart devices. This paper evaluates the power reduction control by the OSCAR Automatic Parallelizing Compiler on an Android platform with the newly developed precise power measurement environment on the ODROID-X2, a development platform with the Samsung Exynos4412 Prime, which consists of 4 ARM Cortex-A9 cores. The OSCAR Compiler enables automatic exploitation of multigrain parallelism within a sequential program, and automatically generates a parallelized code with the OSCAR Multi-Platform API power reduction directives for the purpose of DVFS (Dynamic Voltage and Frequency Scaling), clock gating, and power gating. The paper also introduces a newly developed micro second order pseudo clock gating method to reduce power consumption using WFI (Wait For Interrupt). By inserting GPIO (General Purpose Input Output) control functions into programs, signals appear on the power waveform indicating the point of where the GPIO control was inserted and provides a precise power measurement of the specified program area. The results of the power evaluation for realtime Mpeg2 Decoder show 86.7% power reduction, namely from 2.79[W] to 0.37[W] and for real-time Optical Flow show 86.5% power reduction, namely from 2.23[W] to 0.36[W] on 3 core execution.
KW - API
KW - Android
KW - Automatic parallelization
KW - Multicore processor
KW - Power control
KW - Power reduction
KW - Smart device
KW - WFI
UR - http://www.scopus.com/inward/record.url?scp=84910025793&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84910025793&partnerID=8YFLogxK
U2 - 10.1007/978-3-319-09967-5_9
DO - 10.1007/978-3-319-09967-5_9
M3 - Conference contribution
AN - SCOPUS:84910025793
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 155
EP - 168
BT - Languages and Compilers for Parallel Computing - 26th International Workshop, LCPC 2013, Revised Selected Papers
A2 - Caşcaval, Călin
A2 - Montesinos, Pablo
PB - Springer Verlag
T2 - 26th Workshop on Languages and Compilers for Parallel Computing, LCPC 2013
Y2 - 25 September 2013 through 27 September 2013
ER -