OSCAR multi-grain architecture and its evaluation

H. Kasahara*, W. Ogata, K. Kimura, G. Matsui, H. Matsuzuki, M. Okamoto, A. Yoshida, H. Honda

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

6 Citations (Scopus)

Abstract

OSCAR (Optimally Scheduled Advanced Multiprocessor) was designed to efficiently realize multi-grain parallel processing using static and dynamic scheduling. It is a shared memory multiprocessor system having centralized and distributed shared memories in addition to local memory on each processor with data transfer controller for overlapping of data transfer and task processing. Also, its Fortran multigrain compiler hierarchically exploits coarse grain parallelism among loops, subroutines and basic blocks, conventional medium grain parallelism among loop-iterations in a Doall loop and near fine grain parallelism among statements. At the coarse grain parallel processing, data localization (automatic data distribution) have been employed to minimize data transfer overhead. In the near fine grain processing of a basic block, explicit synchronization can be removed by use of a clock level accurate code scheduling technique with architectural supports. This paper describes OSCAR's architecture, its compiler and the performance for the multi-grain parallel processing. OSCAR's architecture and compilation technology will be more important in future High Performance Computers and single chip multiprocessors.

Original languageEnglish
Pages106-115
Number of pages10
Publication statusPublished - 1997
EventProceedings of the 1997 International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems - Maui, HI, USA
Duration: 1997 Oct 221997 Oct 24

Other

OtherProceedings of the 1997 International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems
CityMaui, HI, USA
Period97/10/2297/10/24

ASJC Scopus subject areas

  • General Computer Science

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