Partially-parallel irregular LDPC decoder based on improved message passing schedule

Xing Li; Kazunori Shimizu; Zhen Qiu; Takeshi Ikenaga; Satoshi Goto

doi:10.1109/MWSCAS.2007.4488821

Partially-parallel irregular LDPC decoder based on improved message passing schedule

Xing Li^*, Kazunori Shimizu, Zhen Qiu, Takeshi Ikenaga, Satoshi Goto

^*Corresponding author for this work

Graduate School of Information, Production and Systems

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

In this paper, we propose a new efficient message-passing schedule for irregular LPDC code. Our approach is based on the schedule designed for regular LDPC code in Ref.[8]. We have modified the original schedule for regular LDPC code and improved it particularly for the irregular LDPC coder realization. The experimental results show that our method could achieve better performance than conventional one, and improve the converging rate as well.

Original language	English
Title of host publication	2007 50th Midwest Symposium on Circuits and Systems, MWSCAS - Conference Proceedings
Pages	1473-1476
Number of pages	4
DOIs	https://doi.org/10.1109/MWSCAS.2007.4488821
Publication status	Published - 2007
Event	2007 50th Midwest Symposium on Circuits and Systems, MWSCAS - Conference - Montreal, QC, Canada Duration: 2007 Aug 5 → 2007 Aug 8

Publication series

Name	Midwest Symposium on Circuits and Systems
ISSN (Print)	1548-3746

Conference

Conference	2007 50th Midwest Symposium on Circuits and Systems, MWSCAS - Conference
Country/Territory	Canada
City	Montreal, QC
Period	07/8/5 → 07/8/8

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/MWSCAS.2007.4488821

Cite this

Partially-parallel irregular LDPC decoder based on improved message passing schedule. / Li, Xing; Shimizu, Kazunori; Qiu, Zhen et al.
2007 50th Midwest Symposium on Circuits and Systems, MWSCAS - Conference Proceedings. 2007. p. 1473-1476 4488821 (Midwest Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Li, X, Shimizu, K, Qiu, Z, Ikenaga, T & Goto, S 2007, Partially-parallel irregular LDPC decoder based on improved message passing schedule. in 2007 50th Midwest Symposium on Circuits and Systems, MWSCAS - Conference Proceedings., 4488821, Midwest Symposium on Circuits and Systems, pp. 1473-1476, 2007 50th Midwest Symposium on Circuits and Systems, MWSCAS - Conference, Montreal, QC, Canada, 07/8/5. https://doi.org/10.1109/MWSCAS.2007.4488821

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author = "Xing Li and Kazunori Shimizu and Zhen Qiu and Takeshi Ikenaga and Satoshi Goto",

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doi = "10.1109/MWSCAS.2007.4488821",

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PY - 2007

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AB - In this paper, we propose a new efficient message-passing schedule for irregular LPDC code. Our approach is based on the schedule designed for regular LDPC code in Ref.[8]. We have modified the original schedule for regular LDPC code and improved it particularly for the irregular LDPC coder realization. The experimental results show that our method could achieve better performance than conventional one, and improve the converging rate as well.

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Partially-parallel irregular LDPC decoder based on improved message passing schedule

Abstract

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ASJC Scopus subject areas

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