Performance of the proposed fast track processor for rare decays at the ATLAS experiment

Guido Volpi*, Mauro Dell'Orso, Francesco Crescioli, Giovanni Punzi, Paola Giannetti, Jacopo Vivarelli, Erik Brubaker, Monica Dunford, Young Kee Kim, Mel Shochet, Giulio Usai, Kohei Yorita, Catalin Ciobanu, Tony Liss

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The Fast Track processor (FTK)[7], [8] has been proposed for high-quality track finding at very high rates (Level-1 output rates) for the LHC experiments. Fast, efficient and precise pattern recognition has been studied using a silicon 6-layer sub-detector, including a subset of the pixel and SCT layers. We tested the FTK algorithms using the ATLAS full simulation. We compare the FTK reconstruction quality with the tracking capability of the offline IPatRec algorithm. We show that similar resolutions and efficiencies are reached by FTK at a speed higher than iPatRec by orders of magnitude. With FTK full events are reconstructed at the Level-1 output rate. Bso → μ+μ- events are fully simulated together with background samples. We show that a low Level-2 rate is allowed by FTK, even using a single 6 GeV Level-1 muon selection trigger. FTK provides the full-resolution track list ready for the Level-2 Bso identification. All selection cuts performed by the Event Filter can be easily anticipated at Level-2. We present the Bso → μ+ μ- efficiency gain and related Level-2 rates.

Original languageEnglish
Title of host publication2007 15th IEEE-NPSS Real-Time Conference, RT
DOIs
Publication statusPublished - 2007
Externally publishedYes
Event2007 15th IEEE-NPSS Real-Time Conference, RT - Batavia, IL, United States
Duration: 2007 Apr 292007 May 4

Publication series

Name2007 15th IEEE-NPSS Real-Time Conference, RT

Conference

Conference2007 15th IEEE-NPSS Real-Time Conference, RT
Country/TerritoryUnited States
CityBatavia, IL
Period07/4/2907/5/4

ASJC Scopus subject areas

  • Hardware and Architecture
  • Control and Systems Engineering

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