Readout ASIC with SOI technology for X-ray CCDs

Tetsuichi Kishishita; Toshihiro Idehara; Hirokazu Ikeda; Hiroshi Tsunemi; Yasuo Arai; Goro Sato; Tadayuki Takahashi

doi:10.1109/TNS.2010.2049371

Readout ASIC with SOI technology for X-ray CCDs

Tetsuichi Kishishita^*, Toshihiro Idehara, Hirokazu Ikeda, Hiroshi Tsunemi, Yasuo Arai, Goro Sato, Tadayuki Takahashi

^*Corresponding author for this work

Waseda Research Institute for Science and Engineering

Research output: Contribution to journal › Article › peer-review

2 Citations (Scopus)

Abstract

We developed an analog front-end application specific integrated circuit (ASIC) with a fully depleted (FD) silicon-on-insulator (SOI) technology for readout of X-ray CCDs. The ASIC contains seven readout channels, each of which is equipped with the correlated double sampling circuit followed by an amplitude-to-pulse width conversion circuit. We combined the ASIC with an X-ray CCD for performance evaluation tests. We succeeded in processing analog signals from the CCD and confirmed an X-ray imaging and photon-counting capabilities by irradiating a radioisotope ⁵⁵Fe. The energy resolution is 305 eV at 5.9 keV (full-width at half maximum) and the readout noise is 53.7 μV for power consumption of 33 mW per chip. The ASIC proves that the FD-SOI process can be a practically usable option for front-end applications.

Original language	English
Article number	5497180
Pages (from-to)	2359-2364
Number of pages	6
Journal	IEEE Transactions on Nuclear Science
Volume	57
Issue number	4 PART 2
DOIs	https://doi.org/10.1109/TNS.2010.2049371
Publication status	Published - 2010 Aug

Keywords

Analog front-end
ASIC
CCD
low noise
SOI (silicon-on-insulator)
VLSI
X-ray

ASJC Scopus subject areas

Electrical and Electronic Engineering
Nuclear Energy and Engineering
Nuclear and High Energy Physics

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10.1109/TNS.2010.2049371

Cite this

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title = "Readout ASIC with SOI technology for X-ray CCDs",

abstract = "We developed an analog front-end application specific integrated circuit (ASIC) with a fully depleted (FD) silicon-on-insulator (SOI) technology for readout of X-ray CCDs. The ASIC contains seven readout channels, each of which is equipped with the correlated double sampling circuit followed by an amplitude-to-pulse width conversion circuit. We combined the ASIC with an X-ray CCD for performance evaluation tests. We succeeded in processing analog signals from the CCD and confirmed an X-ray imaging and photon-counting capabilities by irradiating a radioisotope 55Fe. The energy resolution is 305 eV at 5.9 keV (full-width at half maximum) and the readout noise is 53.7 μV for power consumption of 33 mW per chip. The ASIC proves that the FD-SOI process can be a practically usable option for front-end applications.",

keywords = "Analog front-end, ASIC, CCD, low noise, SOI (silicon-on-insulator), VLSI, X-ray",

author = "Tetsuichi Kishishita and Toshihiro Idehara and Hirokazu Ikeda and Hiroshi Tsunemi and Yasuo Arai and Goro Sato and Tadayuki Takahashi",

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AU - Kishishita, Tetsuichi

AU - Idehara, Toshihiro

AU - Ikeda, Hirokazu

AU - Tsunemi, Hiroshi

AU - Arai, Yasuo

AU - Sato, Goro

AU - Takahashi, Tadayuki

PY - 2010/8

Y1 - 2010/8

N2 - We developed an analog front-end application specific integrated circuit (ASIC) with a fully depleted (FD) silicon-on-insulator (SOI) technology for readout of X-ray CCDs. The ASIC contains seven readout channels, each of which is equipped with the correlated double sampling circuit followed by an amplitude-to-pulse width conversion circuit. We combined the ASIC with an X-ray CCD for performance evaluation tests. We succeeded in processing analog signals from the CCD and confirmed an X-ray imaging and photon-counting capabilities by irradiating a radioisotope 55Fe. The energy resolution is 305 eV at 5.9 keV (full-width at half maximum) and the readout noise is 53.7 μV for power consumption of 33 mW per chip. The ASIC proves that the FD-SOI process can be a practically usable option for front-end applications.

AB - We developed an analog front-end application specific integrated circuit (ASIC) with a fully depleted (FD) silicon-on-insulator (SOI) technology for readout of X-ray CCDs. The ASIC contains seven readout channels, each of which is equipped with the correlated double sampling circuit followed by an amplitude-to-pulse width conversion circuit. We combined the ASIC with an X-ray CCD for performance evaluation tests. We succeeded in processing analog signals from the CCD and confirmed an X-ray imaging and photon-counting capabilities by irradiating a radioisotope 55Fe. The energy resolution is 305 eV at 5.9 keV (full-width at half maximum) and the readout noise is 53.7 μV for power consumption of 33 mW per chip. The ASIC proves that the FD-SOI process can be a practically usable option for front-end applications.

KW - Analog front-end

KW - ASIC

KW - CCD

KW - low noise

KW - SOI (silicon-on-insulator)

KW - VLSI

KW - X-ray

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Readout ASIC with SOI technology for X-ray CCDs

Abstract

Keywords

ASJC Scopus subject areas

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