Reliability Assessment and Quantitative Evaluation of Soft-Error Resilient 3D Network-on-Chip Systems

Khanh N. Dang, Michael Meyer, Yuichi Okuyama, Abderazek Ben Abdallah

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)


Three-Dimensional Networks-on-Chips (3D-NoCs) have been proposed as an auspicious solution, merging the high parallelism of the Network-on-Chip (NoC) paradigm with the high-performance and low-power cost of 3D-ICs. However, as technology scales down, the reliability issues are becoming more crucial, especially for complex 3D-NoC which provides the communication requirements of multi and many-core systems-on-chip. Reliability assessment is prominent for early stages of the manufacturing process to prevent costly redesigns of a target system. In this paper, we present an accurate reliability assessment and quantitative evaluation of a soft-error resilient 3D-NoC based on a soft-error resilient mechanism. The system can recover from transient errors occurring in different pipeline stages of the router. Based on this analysis, the effects of failures in the network's principal components are determined.

Original languageEnglish
Title of host publicationProceedings - 2016 IEEE 25th Asian Test Symposium, ATS 2016
PublisherIEEE Computer Society
Number of pages6
ISBN (Electronic)9781509038084
Publication statusPublished - 2016 Dec 22
Externally publishedYes
Event25th IEEE Asian Test Symposium, ATS 2016 - Hiroshima, Japan
Duration: 2016 Nov 212016 Nov 24

Publication series

NameProceedings of the Asian Test Symposium
ISSN (Print)1081-7735


Other25th IEEE Asian Test Symposium, ATS 2016


  • 3D Network-on-Chip
  • Architecture
  • Fault-tolerant
  • Reliability Assessment
  • Soft-Error

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


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