TY - GEN
T1 - Secure scan design with dynamically configurable connection
AU - Atobe, Yuta
AU - Shi, Youhua
AU - Yanagisawa, Masao
AU - Togawa, Nozomu
PY - 2013/1/1
Y1 - 2013/1/1
N2 - Scan test is a powerful test technique which can control and observe the internal states of the circuit under test through scan chains. However, it has been reported that it's possible to retrieve secret keys from cryptographic LSIs through scan chains. Therefore new secure test methods are required to satisfy both testability and security requirements. In this paper, a secure scan design is proposed to achieve adequate security requirement as a countermeasure against scan-based attacks, while still maintain high testability like normal scan testing. In our method, the internal scan chain is divided into several sub chains, and the connection order of sub chains can be dynamically changed. In addition, how to decide the connection order of those sub chains so that it can't be identified by an attacker is also proposed in this paper. The proposed method is implemented on an AES circuit to show its effectiveness, and a security analysis is also given to show how the proposed approach can be used as a countermeasure against those known scan-based attacks.
AB - Scan test is a powerful test technique which can control and observe the internal states of the circuit under test through scan chains. However, it has been reported that it's possible to retrieve secret keys from cryptographic LSIs through scan chains. Therefore new secure test methods are required to satisfy both testability and security requirements. In this paper, a secure scan design is proposed to achieve adequate security requirement as a countermeasure against scan-based attacks, while still maintain high testability like normal scan testing. In our method, the internal scan chain is divided into several sub chains, and the connection order of sub chains can be dynamically changed. In addition, how to decide the connection order of those sub chains so that it can't be identified by an attacker is also proposed in this paper. The proposed method is implemented on an AES circuit to show its effectiveness, and a security analysis is also given to show how the proposed approach can be used as a countermeasure against those known scan-based attacks.
KW - AES
KW - scan chain
KW - scan-based attack
KW - secure scan design
UR - http://www.scopus.com/inward/record.url?scp=84906761678&partnerID=8YFLogxK
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U2 - 10.1109/PRDC.2013.47
DO - 10.1109/PRDC.2013.47
M3 - Conference contribution
AN - SCOPUS:84906761678
SN - 9780769551302
T3 - Proceedings of IEEE Pacific Rim International Symposium on Dependable Computing, PRDC
SP - 256
EP - 262
BT - Proceedings - 2013 IEEE 19th Pacific Rim International Symposium on Dependable Computing, PRDC 2013
PB - IEEE Computer Society
T2 - 19th IEEE Pacific Rim International Symposium on Dependable Computing, PRDC 2013
Y2 - 2 December 2013 through 4 December 2013
ER -