SOI-DRAM with wide operating voltage range by CMOS/SIMOX technology

Katsuhiro Suma; Takahiro Tsuruda; Hideto Hidaka; Takahisa Eimori; Toshiyuki Oashi; Yasuo Yamaguchi; Toshiaki Iwamatsu; Masakazu Hirose; Fukashi Morishita; Kazutami Arimoto; Kazuyasu Fujishima; Yasuo Inoue; Tadashi Nishimura; Tsutomu Yoshihara

doi:10.1109/4.328631

SOI-DRAM with wide operating voltage range by CMOS/SIMOX technology

Katsuhiro Suma^*, Takahiro Tsuruda, Hideto Hidaka, Takahisa Eimori, Toshiyuki Oashi, Yasuo Yamaguchi, Toshiaki Iwamatsu, Masakazu Hirose, Fukashi Morishita, Kazutami Arimoto, Kazuyasu Fujishima, Yasuo Inoue, Tadashi Nishimura, Tsutomu Yoshihara

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

3 Citations (Scopus)

Abstract

An SOI-DRAM test device (64-Kb scale) with 100-nm-thick SOI film has been fabricated in 0.5-μm CMOS/SIMOX technology and the basic DRAM function has been successfully observed. A partially depleted transistor was used to solve the floating-body effect, resulting in improved operation. The newly introduced body-synchronized sensing scheme enhances the lower V_cc margin. The p-n junction capacitance between source/drain and a substrate for SOI structure is reduced by 25%. RAS access time tRAC is 70 ns with a 2.7-V power supply, which is as fast as the equivalent bulk-Si device with a 4-V power supply. The active current consumption is 1.1 mA (V_cc = 3.0 V, 260-ns cycle) for this SOI-DRAM, which is a reduction of 65%, compared with 3.2 mA for the reference bulk-Si DRAM. The mean value of data retention time for this chip at 80 °C is longer than 20 s (V_cc = 3.3 V), which is the same value as mass-produced 16-Mb DRAM's. The SOI-DRAM has an operating V_cc range from 2.3 V to 4.0 V. The observed speed enhancement and the wide operating voltage range indicate high performance at the low voltage operation suitable for battery-operated DRAM's.

Original language	English
Pages (from-to)	1323-1329
Number of pages	7
Journal	IEEE Journal of Solid-State Circuits
Volume	29
Issue number	11
DOIs	https://doi.org/10.1109/4.328631
Publication status	Published - 1994 Nov
Externally published	Yes

ASJC Scopus subject areas

Electrical and Electronic Engineering

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title = "SOI-DRAM with wide operating voltage range by CMOS/SIMOX technology",

abstract = "An SOI-DRAM test device (64-Kb scale) with 100-nm-thick SOI film has been fabricated in 0.5-μm CMOS/SIMOX technology and the basic DRAM function has been successfully observed. A partially depleted transistor was used to solve the floating-body effect, resulting in improved operation. The newly introduced body-synchronized sensing scheme enhances the lower Vcc margin. The p-n junction capacitance between source/drain and a substrate for SOI structure is reduced by 25%. RAS access time tRAC is 70 ns with a 2.7-V power supply, which is as fast as the equivalent bulk-Si device with a 4-V power supply. The active current consumption is 1.1 mA (Vcc = 3.0 V, 260-ns cycle) for this SOI-DRAM, which is a reduction of 65%, compared with 3.2 mA for the reference bulk-Si DRAM. The mean value of data retention time for this chip at 80 °C is longer than 20 s (Vcc = 3.3 V), which is the same value as mass-produced 16-Mb DRAM's. The SOI-DRAM has an operating Vcc range from 2.3 V to 4.0 V. The observed speed enhancement and the wide operating voltage range indicate high performance at the low voltage operation suitable for battery-operated DRAM's.",

author = "Katsuhiro Suma and Takahiro Tsuruda and Hideto Hidaka and Takahisa Eimori and Toshiyuki Oashi and Yasuo Yamaguchi and Toshiaki Iwamatsu and Masakazu Hirose and Fukashi Morishita and Kazutami Arimoto and Kazuyasu Fujishima and Yasuo Inoue and Tadashi Nishimura and Tsutomu Yoshihara",

year = "1994",

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AU - Suma, Katsuhiro

AU - Tsuruda, Takahiro

AU - Hidaka, Hideto

AU - Eimori, Takahisa

AU - Oashi, Toshiyuki

AU - Yamaguchi, Yasuo

AU - Iwamatsu, Toshiaki

AU - Hirose, Masakazu

AU - Morishita, Fukashi

AU - Arimoto, Kazutami

AU - Fujishima, Kazuyasu

AU - Inoue, Yasuo

AU - Nishimura, Tadashi

AU - Yoshihara, Tsutomu

PY - 1994/11

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N2 - An SOI-DRAM test device (64-Kb scale) with 100-nm-thick SOI film has been fabricated in 0.5-μm CMOS/SIMOX technology and the basic DRAM function has been successfully observed. A partially depleted transistor was used to solve the floating-body effect, resulting in improved operation. The newly introduced body-synchronized sensing scheme enhances the lower Vcc margin. The p-n junction capacitance between source/drain and a substrate for SOI structure is reduced by 25%. RAS access time tRAC is 70 ns with a 2.7-V power supply, which is as fast as the equivalent bulk-Si device with a 4-V power supply. The active current consumption is 1.1 mA (Vcc = 3.0 V, 260-ns cycle) for this SOI-DRAM, which is a reduction of 65%, compared with 3.2 mA for the reference bulk-Si DRAM. The mean value of data retention time for this chip at 80 °C is longer than 20 s (Vcc = 3.3 V), which is the same value as mass-produced 16-Mb DRAM's. The SOI-DRAM has an operating Vcc range from 2.3 V to 4.0 V. The observed speed enhancement and the wide operating voltage range indicate high performance at the low voltage operation suitable for battery-operated DRAM's.

AB - An SOI-DRAM test device (64-Kb scale) with 100-nm-thick SOI film has been fabricated in 0.5-μm CMOS/SIMOX technology and the basic DRAM function has been successfully observed. A partially depleted transistor was used to solve the floating-body effect, resulting in improved operation. The newly introduced body-synchronized sensing scheme enhances the lower Vcc margin. The p-n junction capacitance between source/drain and a substrate for SOI structure is reduced by 25%. RAS access time tRAC is 70 ns with a 2.7-V power supply, which is as fast as the equivalent bulk-Si device with a 4-V power supply. The active current consumption is 1.1 mA (Vcc = 3.0 V, 260-ns cycle) for this SOI-DRAM, which is a reduction of 65%, compared with 3.2 mA for the reference bulk-Si DRAM. The mean value of data retention time for this chip at 80 °C is longer than 20 s (Vcc = 3.3 V), which is the same value as mass-produced 16-Mb DRAM's. The SOI-DRAM has an operating Vcc range from 2.3 V to 4.0 V. The observed speed enhancement and the wide operating voltage range indicate high performance at the low voltage operation suitable for battery-operated DRAM's.

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SOI-DRAM with wide operating voltage range by CMOS/SIMOX technology

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