TY - JOUR
T1 - Subquarter-micrometer dual gate complementary metal oxide semiconductor field effect transistor with ultrathin gate oxide of 2 nm
AU - Shimizu, Masahiro
AU - Kuroi, Takashi
AU - Inuishi, Masahide
AU - Arima, Hideaki
AU - Abe, Haruhiko
AU - Hamaguchi, Chihiro
PY - 1998/11
Y1 - 1998/11
N2 - The high performance of 0.25 μm dual gate complementary metal oxide semiconductor with an ultrathin gate oxide of 2 nm is demonstrated for low-voltage logic applications. Boron penetration can be effectively suppressed by the nitrogen implantation technique, even if the gate oxide film is reduced to 2 nm. It is confirmed that N-channel and P-channel metal oxide semiconductor field effect transistors (MOSFETs) with high current drivability can be realized by the thin gate oxide, although the transconductance is not inversely proportional to the gate oxide thickness due to the increase in the effect of the inversion capacitance and the gate depletion. The inverter delay time with the aluminum interconnect load is markedly improved by the highly drivable MOSFETs with thin gate oxide, especially at low-voltage operation. Furthermore, hot carrier degradation of N-channel MOSFETs can be suppressed by reducing the gate oxide thickness. However, it was found that the hot carrier degradation of P-channel MOSFETs is enhanced in the thin gate oxide region under channel hot hole injection.
AB - The high performance of 0.25 μm dual gate complementary metal oxide semiconductor with an ultrathin gate oxide of 2 nm is demonstrated for low-voltage logic applications. Boron penetration can be effectively suppressed by the nitrogen implantation technique, even if the gate oxide film is reduced to 2 nm. It is confirmed that N-channel and P-channel metal oxide semiconductor field effect transistors (MOSFETs) with high current drivability can be realized by the thin gate oxide, although the transconductance is not inversely proportional to the gate oxide thickness due to the increase in the effect of the inversion capacitance and the gate depletion. The inverter delay time with the aluminum interconnect load is markedly improved by the highly drivable MOSFETs with thin gate oxide, especially at low-voltage operation. Furthermore, hot carrier degradation of N-channel MOSFETs can be suppressed by reducing the gate oxide thickness. However, it was found that the hot carrier degradation of P-channel MOSFETs is enhanced in the thin gate oxide region under channel hot hole injection.
KW - Dual gate CMOS
KW - Gate oxide
KW - Hot carrier reliability
KW - MOSFET
KW - Tunneling current
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U2 - 10.1143/jjap.37.5926
DO - 10.1143/jjap.37.5926
M3 - Article
AN - SCOPUS:0032205615
SN - 0021-4922
VL - 37
SP - 5926
EP - 5931
JO - Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
JF - Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
IS - 11
ER -