Substrate Bias Effect on SOI-based Thermoelectric Power Generator

Hiroshi Inokawa*, Yuto Goi, Toshiaki Yorigami, Kyohei Shirotori, Hiroaki Satoh, Motohiro Tomita, Takeo Matsuki, Hiroya Ikeda, Takanobu Watanabe

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Thermoelectric characteristics of phosphorus-doped silicon (Si) nanowire (NW) are evaluated in terms of the substrate bias effect. It is found that the narrower wire is more sensitive to the substrate voltage presumably due to the field crowding effect. In case of 200-nm-wide NW, application of 40 V to the substrate increases the NW conductance by a factor of 55.4, and leads to ×25.9 improvement in power generation, even though the Seebeck coefficient is reduced to 74%. The result suggests that the performance of the Si thermoelectric generator could be improved or optimized by the substrate bias control.

Original languageEnglish
Title of host publication17th International Conference on Quality in Research, QIR 2021
Subtitle of host publicationInternational Symposium on Electrical and Computer Engineering
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages119-122
Number of pages4
ISBN (Electronic)9781665496964
DOIs
Publication statusPublished - 2021
Event17th International Conference on Quality in Research, QIR 2021: International Symposium on Electrical and Computer Engineering - Virtual, Online, Indonesia
Duration: 2021 Oct 132021 Oct 15

Publication series

Name17th International Conference on Quality in Research, QIR 2021: International Symposium on Electrical and Computer Engineering

Conference

Conference17th International Conference on Quality in Research, QIR 2021: International Symposium on Electrical and Computer Engineering
Country/TerritoryIndonesia
CityVirtual, Online
Period21/10/1321/10/15

Keywords

  • Seebeck coefficient
  • Silicon
  • silicon-on-insulator (SOI)
  • substrate bias effect
  • thermoelectric power generator (TEG)

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Safety, Risk, Reliability and Quality
  • Control and Optimization

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