This paper reports a supplemental process design kit (PDK) for ASAP7 PDK using Synopsys design flow. ASAP7 is a PDK for “predictable” 7-nm FinFET technology node. ASAP7 PDK is useful for academical and educational purpose, however it only supports Cadence platform for Place and Route. A supplemental PDK is designed for ASAP7 to use Synopsys platform for Place and Route. This PDK is opened at the author’s GitHub site for both acamemical and educational usage.
|Number of pages||3|
|Journal||IPSJ Transactions on System LSI Design Methodology|
|Publication status||Published - 2021|
- Process design kit, ASAP7
ASJC Scopus subject areas
- Computer Science Applications
- Electrical and Electronic Engineering