Supplemental PDK for ASAP7 using synopsys flow

Shinichi Nishizawa; Shih Ting Lin; Yih Lang Li; Hidetoshi Onodera

doi:10.2197/IPSJTSLDM.14.24

Supplemental PDK for ASAP7 using synopsys flow

Shinichi Nishizawa^*, Shih Ting Lin, Yih Lang Li, Hidetoshi Onodera

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

1 Citation (Scopus)

Abstract

This paper reports a supplemental process design kit (PDK) for ASAP7 PDK using Synopsys design flow. ASAP7 is a PDK for “predictable” 7-nm FinFET technology node. ASAP7 PDK is useful for academical and educational purpose, however it only supports Cadence platform for Place and Route. A supplemental PDK is designed for ASAP7 to use Synopsys platform for Place and Route. This PDK is opened at the author’s GitHub site for both acamemical and educational usage.

Original language	English
Pages (from-to)	24-26
Number of pages	3
Journal	IPSJ Transactions on System LSI Design Methodology
Volume	14
DOIs	https://doi.org/10.2197/IPSJTSLDM.14.24
Publication status	Published - 2021
Externally published	Yes

Keywords

Process design kit, ASAP7

ASJC Scopus subject areas

Computer Science Applications
Electrical and Electronic Engineering

Access to Document

10.2197/IPSJTSLDM.14.24

Cite this

@article{831362f0ece540f2a6f8ec3fdb284acb,

title = "Supplemental PDK for ASAP7 using synopsys flow",

abstract = "This paper reports a supplemental process design kit (PDK) for ASAP7 PDK using Synopsys design flow. ASAP7 is a PDK for “predictable” 7-nm FinFET technology node. ASAP7 PDK is useful for academical and educational purpose, however it only supports Cadence platform for Place and Route. A supplemental PDK is designed for ASAP7 to use Synopsys platform for Place and Route. This PDK is opened at the author{\textquoteright}s GitHub site for both acamemical and educational usage.",

keywords = "Process design kit, ASAP7",

author = "Shinichi Nishizawa and Lin, {Shih Ting} and Li, {Yih Lang} and Hidetoshi Onodera",

note = "Funding Information: Acknowledgments Authors thank all of contributers for ASAP7 PDK design and distribution. This work is also partly supported by VLSI Design and Education Center (VDEC), the University of Tokyo in collaboration with Synopsys, Inc., Cadence Design Systems, Inc., and Mentor Graphics, Inc. Publisher Copyright: c 2021 Information Processing Society of Japan",

year = "2021",

doi = "10.2197/IPSJTSLDM.14.24",

language = "English",

volume = "14",

pages = "24--26",

journal = "IPSJ Transactions on System LSI Design Methodology",

issn = "1882-6687",

publisher = "Information Processing Society of Japan",

}

TY - JOUR

T1 - Supplemental PDK for ASAP7 using synopsys flow

AU - Nishizawa, Shinichi

AU - Lin, Shih Ting

AU - Li, Yih Lang

AU - Onodera, Hidetoshi

N1 - Funding Information: Acknowledgments Authors thank all of contributers for ASAP7 PDK design and distribution. This work is also partly supported by VLSI Design and Education Center (VDEC), the University of Tokyo in collaboration with Synopsys, Inc., Cadence Design Systems, Inc., and Mentor Graphics, Inc. Publisher Copyright: c 2021 Information Processing Society of Japan

PY - 2021

Y1 - 2021

N2 - This paper reports a supplemental process design kit (PDK) for ASAP7 PDK using Synopsys design flow. ASAP7 is a PDK for “predictable” 7-nm FinFET technology node. ASAP7 PDK is useful for academical and educational purpose, however it only supports Cadence platform for Place and Route. A supplemental PDK is designed for ASAP7 to use Synopsys platform for Place and Route. This PDK is opened at the author’s GitHub site for both acamemical and educational usage.

AB - This paper reports a supplemental process design kit (PDK) for ASAP7 PDK using Synopsys design flow. ASAP7 is a PDK for “predictable” 7-nm FinFET technology node. ASAP7 PDK is useful for academical and educational purpose, however it only supports Cadence platform for Place and Route. A supplemental PDK is designed for ASAP7 to use Synopsys platform for Place and Route. This PDK is opened at the author’s GitHub site for both acamemical and educational usage.

KW - Process design kit, ASAP7

UR - http://www.scopus.com/inward/record.url?scp=85113409614&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85113409614&partnerID=8YFLogxK

U2 - 10.2197/IPSJTSLDM.14.24

DO - 10.2197/IPSJTSLDM.14.24

M3 - Article

AN - SCOPUS:85113409614

SN - 1882-6687

VL - 14

SP - 24

EP - 26

JO - IPSJ Transactions on System LSI Design Methodology

JF - IPSJ Transactions on System LSI Design Methodology

ER -

Supplemental PDK for ASAP7 using synopsys flow

Abstract

Keywords

ASJC Scopus subject areas

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