Temporal and spatial isolation in a virtualization layer for multi-core processor based information appliances

Tatsuo Nakajima; Yuki Kinebuchi; Hiromasa Shimada; Alexandre Courbot; Tsung Han Lin

doi:10.1109/ASPDAC.2011.5722268

Temporal and spatial isolation in a virtualization layer for multi-core processor based information appliances

Tatsuo Nakajima^*, Yuki Kinebuchi, Hiromasa Shimada, Alexandre Courbot, Tsung Han Lin

^*Corresponding author for this work

School of Fundamental Science and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

8 Citations (Scopus)

Abstract

A virtualization layer makes it possible to compose multiple functionalities on a multi-core processor with minimum modifications of OS kernels and applications. A multi-core processor is a good candidate to compose various software independently developed for dedicated processors into one multi-core processor to reduce both the hardware and development cost. In this paper, we present SPUMONE, which is a virtualization layer suitable for developing multi-core processor based-information appliances.

Original language	English
Title of host publication	2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011
Pages	645-652
Number of pages	8
DOIs	https://doi.org/10.1109/ASPDAC.2011.5722268
Publication status	Published - 2011 Mar 28
Event	2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011 - Yokohama, Japan Duration: 2011 Jan 25 → 2011 Jan 28

Publication series

Name	Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Conference

Conference	2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011
Country/Territory	Japan
City	Yokohama
Period	11/1/25 → 11/1/28

ASJC Scopus subject areas

Computer Science Applications
Computer Graphics and Computer-Aided Design
Electrical and Electronic Engineering

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10.1109/ASPDAC.2011.5722268

Cite this

Nakajima, T., Kinebuchi, Y., Shimada, H., Courbot, A., & Lin, T. H. (2011). Temporal and spatial isolation in a virtualization layer for multi-core processor based information appliances. In 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011 (pp. 645-652). Article 5722268 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). https://doi.org/10.1109/ASPDAC.2011.5722268

Temporal and spatial isolation in a virtualization layer for multi-core processor based information appliances. / Nakajima, Tatsuo; Kinebuchi, Yuki; Shimada, Hiromasa et al.
2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011. 2011. p. 645-652 5722268 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Nakajima, T, Kinebuchi, Y, Shimada, H, Courbot, A & Lin, TH 2011, Temporal and spatial isolation in a virtualization layer for multi-core processor based information appliances. in 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011., 5722268, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 645-652, 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011, Yokohama, Japan, 11/1/25. https://doi.org/10.1109/ASPDAC.2011.5722268

Nakajima T, Kinebuchi Y, Shimada H, Courbot A, Lin TH. Temporal and spatial isolation in a virtualization layer for multi-core processor based information appliances. In 2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011. 2011. p. 645-652. 5722268. (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). doi: 10.1109/ASPDAC.2011.5722268

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Temporal and spatial isolation in a virtualization layer for multi-core processor based information appliances

Abstract

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ASJC Scopus subject areas

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