The Associative Memory System Infrastructures for the ATLAS Fast Tracker

C. L. Sotiropoulou, I. Maznas, S. Citraro*, A. Annovi, L. S. Ancu, R. Beccherle, F. Bertolucci, N. Biesuz, D. Calabrò, F. Crescioli, D. Dimas, M. Dell'Orso, S. Donati, C. Gentsos, P. Giannetti, S. Gkaitatzis, J. Gramling, V. Greco, P. Kalaitzidis, K. KordasN. Kimura, T. Kubota, A. Iovene, A. Lanza, P. Luciano, B. Magnin, K. Mermikli, H. Nasimi, A. Negri, S. Nikolaidis, M. Piendibene, A. Sakellariou, D. Sampsonidis, G. Volpi

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

7 Citations (Scopus)


The associative memory (AM) system of fast tracker (FTK) processor has been designed for the tracking trigger upgrade to the ATLAS detector at the Conseil Europeen Pour La Recherche Nucleaire large hadron collider. The system performs pattern matching (PM) using the detector hits of particles in the ATLAS silicon tracker. The AM system is the main processing element of FTK and is mainly based on the use of application-specified integrated circuits (ASICs) (AM chips) designed to execute PM with a high degree of parallelism. It finds track candidates at low resolution which become seeds for a full resolution track fitting. The AM system implementation is based on a collection of large 9U Versa Module Europa (VME) boards, named "serial link processors" (AMBSLPs). On these boards, a huge traffic of data is implemented on a network of 900 2-Gb/s serial links. The complete AM-based processor consumes much less power (50 kW) than its CPU equivalent and its size is much smaller. The AMBSLP has a power consumption of 250 W and there will be 16 of them in a crate. This results in unusually large power consumption for a VME crate and the need for complex custom infrastructure in order to have sufficient cooling. This paper reports on the design and testing of the infrastructures needed to run and cool the system which will include 16 AMBSLPs in the same crate, the integration of the AMBSLP inside a first FTK slice, the performance of the produced prototypes (both hardware and firmware), as well as their tests in the global FTK integration. This is an important milestone to be satisfied before the FTK production.

Original languageEnglish
Article number7927452
Pages (from-to)1248-1254
Number of pages7
JournalIEEE Transactions on Nuclear Science
Issue number6
Publication statusPublished - 2017 Jun
Externally publishedYes


  • Application specific integrated circuits
  • field-programmable gate arrays (FPGAs)
  • image processing
  • parallel processing
  • pattern matching (PM)
  • trigger circuits

ASJC Scopus subject areas

  • Nuclear and High Energy Physics
  • Nuclear Energy and Engineering
  • Electrical and Electronic Engineering


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