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早稲田大学 ホーム
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プロファイル
研究部門
研究成果
専門知識、名前、または所属機関で検索
Scopus著者プロファイル
史 又華
教授
Professor 教授
,
基幹理工学部
ウェブサイト
https://w-rdb.waseda.jp/html/100000830_ja.html
h-index
524
被引用数
12
h 指数
Pureの文献数とScopusの被引用数に基づいて算出されます
2001
2025
年別の研究成果
概要
フィンガープリント
ネットワーク
研究成果
(78)
類似のプロファイル
(5)
フィンガープリント
Youhua Shiが活動している研究トピックを掘り下げます。このトピックラベルは、この研究者の研究成果に基づきます。これらがまとまってユニークなフィンガープリントを構成します。
並べ替え順
重み付け
アルファベット順
Computer Science
Experimental Result
100%
High Level Synthesis
85%
Scan Chain
73%
Synthesis Algorithm
72%
Test Data Volume
69%
Side Channel Attack
48%
Compression Technique
43%
Test Compression
36%
Power Efficient
36%
Energy Efficient
36%
Architecture Register
34%
Test Generation
33%
Data Compression
32%
Supply Voltage
30%
Test Application Time
30%
Floorplanning
28%
Delay Variation
28%
Processing Element
24%
Advanced Encryption Standard
24%
Soft Error
24%
Path Selection Algorithm
24%
Multiple Scan Chain
24%
Prediction Error
24%
linear-feedback shift register
24%
Fault Diagnosis
24%
Power Consumption
23%
Low Power Consumption
22%
Critical Path
18%
Parallel Architectures
18%
Design Phase
18%
Finite Impulse Response Filter
18%
Error Detection
16%
Fault Coverage
15%
Driven Architecture
15%
Density Functional Theory
14%
Design Challenge
14%
Object Detection
14%
Functional Unit
14%
Conventional Algorithm
14%
Energy Saving
13%
Deep Convolutional Neural Networks
12%
Classification Method
12%
Symmetric Key Cipher
12%
Synthesis Technique
12%
Hashing Algorithm
12%
Checkpoint Selection
12%
Process Variation
12%
Effective Solution
12%
Handling Technique
12%
Insertion Algorithm
12%
Engineering
Test Data
70%
Electric Power Utilization
61%
Adders
48%
Data Volume
46%
Experimental Result
43%
Compression Technique
39%
Processing Element
36%
Built-in Self Test
36%
Compactor
30%
FIR Filter
29%
Area Overhead
27%
Triboelectric Nanogenerators
24%
Internals
24%
Convolutional Neural Network
24%
Finite Impulse Response
24%
Run Length
24%
Reconfiguration
24%
Critical Path
21%
Energy Engineering
20%
Test Technique
18%
Compression Test
18%
Compression Method
18%
Joints (Structural Components)
18%
Cost Reduction
18%
Shift Register
18%
Nodes
18%
Error Detection
16%
Soft Error
16%
Computation Complexity
14%
Parallelism
12%
Selection Algorithm
12%
Side Channel Attack
12%
Hardware Accelerator
12%
Mode Selection
12%
Coding Efficiency
12%
Data Rate
12%
Mixed Sequence
12%
Input Register
12%
Reusability
12%
Product Design
12%
Pattern Generator
12%
Voltage Scaling
12%
Digital Signal Processing
12%
Area Reduction
12%
Scan Path
12%
Interface Circuit
12%
Test Time
12%
Directional
12%
Digital Converter
12%
Prediction Error
12%
Keyphrases
High-level Synthesis
36%
Floorplanning
32%
Compression Techniques
24%
Low Power BIST
24%
Delay Variation
24%
Synthesis Algorithm
24%
Montgomery Modular multiplication
24%
Radix
24%
Unified Dual
24%
Gate-level Netlist
24%
Hardware Trojan
24%
Test Data Compression
24%
Zero-gating
24%
Huddle
20%
Processing Element Design
20%
Cryptographic Hardware
18%
Interconnect Delay
18%
Test Data Volume
18%
Subchain
17%
Secure Scan Design
16%
Test Quality
16%
Fault Coverage
15%
Test Cost Reduction
15%
Scan Chain
15%
Scan Test
13%
Adaptive Voltage
13%
Approximate Adder
12%
Adder Design
12%
Scan Architecture
12%
Symmetric Cipher
12%
Transition Delay Fault
12%
In-situ Error Detection
12%
Triboelectric Nanogenerator
12%
Instruction Set Extensions
12%
SHA-3
12%
Fan-out
12%
32-bit Processor
12%
Test Pattern
12%
Multi-scan
12%
Advanced Encryption Standard
12%
Response Design
12%
Timing Error Prediction
12%
Checkpoint Selection
12%
Mixed Encoding
12%
Energy Efficient
12%
Parallel FIR Filter
12%
Body Biasing
12%
Differential Fault Analysis
12%
Hybrid Dictionary
12%
Clock Glitch
12%
