17-bit oversampling D-to-A conversion technology using multistage noise shaping

Yasuyuki Matsuya; Kuniharu Uchimura; Atsushi Iwata; Takao Kaneko

doi:10.1109/4.34079

17-bit oversampling D-to-A conversion technology using multistage noise shaping

Yasuyuki Matsuya^*, Kuniharu Uchimura, Atsushi Iwata, Takao Kaneko

^*この研究の対応する著者

研究成果: Conference article › 査読

31 被引用数 (Scopus)

抄録

A description is given of a highly stable, triple-integration two-stage noise-shaping technique and a precise differential pulse-width modulation (PWM) output method which permits greater accuracy in monolithic audio digital-to-analog (D-to-A) converters (DACs) without trimming. Based on these techniques and using 1.5-μm CMOS technology, a 17-bit 20-kHz-bandwidth DAC LSI chip with digital filters was developed. A signal-to-noise ratio (S/(N + THD)) of 101 dB and a total harmonic distortion (THD) of 0.0007% at full-scale input were obtained.

本文言語	English
ページ（範囲）	969-975
ページ数	7
ジャーナル	IEEE Journal of Solid-State Circuits
巻	24
号	4
DOI	https://doi.org/10.1109/4.34079
出版ステータス	Published - 1989
外部発表	はい
イベント	Symposium on VLSI Circuits - Tokyo, Japan 継続期間: 1988 8月 22 → 1988 8月 24

ASJC Scopus subject areas

電子工学および電気工学

文献へのアクセス

10.1109/4.34079

他のファイルとリンク

引用スタイル

@article{f7c62634b8d54f449d3618fe2284a458,

title = "17-bit oversampling D-to-A conversion technology using multistage noise shaping",

abstract = "A description is given of a highly stable, triple-integration two-stage noise-shaping technique and a precise differential pulse-width modulation (PWM) output method which permits greater accuracy in monolithic audio digital-to-analog (D-to-A) converters (DACs) without trimming. Based on these techniques and using 1.5-μm CMOS technology, a 17-bit 20-kHz-bandwidth DAC LSI chip with digital filters was developed. A signal-to-noise ratio (S/(N + THD)) of 101 dB and a total harmonic distortion (THD) of 0.0007% at full-scale input were obtained.",

author = "Yasuyuki Matsuya and Kuniharu Uchimura and Atsushi Iwata and Takao Kaneko",

year = "1989",

doi = "10.1109/4.34079",

language = "English",

volume = "24",

pages = "969--975",

journal = "IEEE Journal of Solid-State Circuits",

issn = "0018-9200",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "4",

note = "Symposium on VLSI Circuits ; Conference date: 22-08-1988 Through 24-08-1988",

}

TY - JOUR

T1 - 17-bit oversampling D-to-A conversion technology using multistage noise shaping

AU - Matsuya, Yasuyuki

AU - Uchimura, Kuniharu

AU - Iwata, Atsushi

AU - Kaneko, Takao

PY - 1989

Y1 - 1989

N2 - A description is given of a highly stable, triple-integration two-stage noise-shaping technique and a precise differential pulse-width modulation (PWM) output method which permits greater accuracy in monolithic audio digital-to-analog (D-to-A) converters (DACs) without trimming. Based on these techniques and using 1.5-μm CMOS technology, a 17-bit 20-kHz-bandwidth DAC LSI chip with digital filters was developed. A signal-to-noise ratio (S/(N + THD)) of 101 dB and a total harmonic distortion (THD) of 0.0007% at full-scale input were obtained.

AB - A description is given of a highly stable, triple-integration two-stage noise-shaping technique and a precise differential pulse-width modulation (PWM) output method which permits greater accuracy in monolithic audio digital-to-analog (D-to-A) converters (DACs) without trimming. Based on these techniques and using 1.5-μm CMOS technology, a 17-bit 20-kHz-bandwidth DAC LSI chip with digital filters was developed. A signal-to-noise ratio (S/(N + THD)) of 101 dB and a total harmonic distortion (THD) of 0.0007% at full-scale input were obtained.

UR - http://www.scopus.com/inward/record.url?scp=0024716952&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0024716952&partnerID=8YFLogxK

U2 - 10.1109/4.34079

DO - 10.1109/4.34079

M3 - Conference article

AN - SCOPUS:0024716952

SN - 0018-9200

VL - 24

SP - 969

EP - 975

JO - IEEE Journal of Solid-State Circuits

JF - IEEE Journal of Solid-State Circuits

IS - 4

T2 - Symposium on VLSI Circuits

Y2 - 22 August 1988 through 24 August 1988

ER -

17-bit oversampling D-to-A conversion technology using multistage noise shaping

抄録

ASJC Scopus subject areas

文献へのアクセス

他のファイルとリンク

フィンガープリント

引用スタイル