A description is given of a highly stable, triple-integration two-stage noise-shaping technique and a precise differential pulse-width modulation (PWM) output method which permits greater accuracy in monolithic audio digital-to-analog (D-to-A) converters (DACs) without trimming. Based on these techniques and using 1.5-μm CMOS technology, a 17-bit 20-kHz-bandwidth DAC LSI chip with digital filters was developed. A signal-to-noise ratio (S/(N + THD)) of 101 dB and a total harmonic distortion (THD) of 0.0007% at full-scale input were obtained.
|ジャーナル||IEEE Journal of Solid-State Circuits|
|出版ステータス||Published - 1989|
|イベント||Symposium on VLSI Circuits - Tokyo, Japan|
継続期間: 1988 8月 22 → 1988 8月 24
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