TY - GEN
T1 - 4-4 effect of unit-cell arrangement on performance of multi-stage-planar cavity-free unileg thermoelectric generator using silicon nanowires
AU - Abe, Katsuki
AU - Oda, Kaito
AU - Tomita, Motohiro
AU - Matsuki, Takeo
AU - Matsukawa, Takashi
AU - Watanabe, Takanobu
N1 - Publisher Copyright:
© 2020 The Japan Society of Applied Physics.
PY - 2020/9/23
Y1 - 2020/9/23
N2 - We compare the thermoelectric (TE) performances between two types of unit cell arrangements of planar unileg TE generators of silicon-nanowire (Si-NW). The planar TE generators are driven by the temperature gradient along the Si-NW. The TE performance highly depends on how the hot and cold sides of the unit cell is oriented with respect to the neighboring cells. If the hot sides of neighboring cells are placed next to each other, TE power is improved compared to the case where the hot and cold side of TE generator is arranged alternately. Optimal conditions of Si-NW length and metal wiring structure are also discussed.
AB - We compare the thermoelectric (TE) performances between two types of unit cell arrangements of planar unileg TE generators of silicon-nanowire (Si-NW). The planar TE generators are driven by the temperature gradient along the Si-NW. The TE performance highly depends on how the hot and cold sides of the unit cell is oriented with respect to the neighboring cells. If the hot sides of neighboring cells are placed next to each other, TE power is improved compared to the case where the hot and cold side of TE generator is arranged alternately. Optimal conditions of Si-NW length and metal wiring structure are also discussed.
KW - Nanowire
KW - Semiconductor
KW - Si
KW - Thermoelectric generator
UR - http://www.scopus.com/inward/record.url?scp=85096242711&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85096242711&partnerID=8YFLogxK
U2 - 10.23919/SISPAD49475.2020.9241598
DO - 10.23919/SISPAD49475.2020.9241598
M3 - Conference contribution
AN - SCOPUS:85096242711
T3 - International Conference on Simulation of Semiconductor Processes and Devices, SISPAD
SP - 75
EP - 78
BT - 2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020
Y2 - 3 September 2020 through 6 October 2020
ER -