@inproceedings{14f28ddd191643bd84f0a5a01be97c59,
title = "A 113 GHz 176 mW transmitter and receiver chipset using 65 nm CMOS technology",
abstract = "A 113 GHz 176.4 mW transmitter and receiver chipset using 65 nm CMOS technology is presented. To achieve low power consumption, an amplitude shift keying modulation with a simple circuit is adopted for this chipset, and the transmitter does not have a power amplifier. The power consumptions of the transmitter and receiver are 65.5 and 110.9 mW, respectively. A 2.5 Gbps pseudorandom bit sequence is successfully transferred from the transmitter to the receiver by wireless propagation through a distance of 0.2 m with a bit error rate of less than 10-8. The transmitter has an output power of -0.05 dBm.",
keywords = "ASK, Millimeter-wave, data rate, receiver, transmitter, wireless",
author = "Naoko Ono and Mizuki Motoyoshi and Kyoya Takano and Kosuke Katayama and Ryuichi Fujimoto and Minoru Fujishima",
year = "2012",
month = dec,
day = "1",
doi = "10.1109/APMC.2012.6421624",
language = "English",
isbn = "9781457713309",
series = "Asia-Pacific Microwave Conference Proceedings, APMC",
pages = "439--441",
booktitle = "2012 Asia-Pacific Microwave Conference, APMC 2012 - Proceedings",
note = "2012 Asia-Pacific Microwave Conference, APMC 2012 ; Conference date: 04-12-2012 Through 07-12-2012",
}