抄録
A 125 mm2 1 Gb NAND flash memory with 10 MB/s program throughput was presented. The 1 Gb flash has the highest memory density among 2LC memories and the highest cell/chip efficiency among flash memories. Two techniques were adopted in the architecture for reducing the chip size, the number of memory cells in a NAND string was changed to 32 and each word line (WL) crossed (1024+32)×16 bit lines.
本文言語 | English |
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ページ(範囲) | 106-107+450+99 |
ジャーナル | Digest of Technical Papers - IEEE International Solid-State Circuits Conference |
出版ステータス | Published - 2002 |
外部発表 | はい |
イベント | 2002 IEEE International Solid-State Circuits Conference - San Francisco, CA, United States 継続期間: 2002 2月 3 → 2002 2月 7 |
ASJC Scopus subject areas
- 電子材料、光学材料、および磁性材料
- 電子工学および電気工学