TY - GEN
T1 - A 28-GHz band highly linear power amplifier with novel adaptive bias circuit for cascode MOSFET in 56-nm SOI CMOS
AU - Sato, Hiroya
AU - Yanagisawa, Masao
AU - Yoshimasu, Toshihiko
N1 - Publisher Copyright:
© 2017 IEEE. All rights reserved.
PY - 2017/12/1
Y1 - 2017/12/1
N2 - This paper presents a highly linear 28-GHz band SOI CMOS power amplifier with an adaptive bias circuit for cascode MOSFET for next generation wireless communication. The power amplifier consists of a cascode MOSFET, the adaptive bias circuit and the input and output matching circuits. The power amplifier has exhibited a simulated output P1dB (1-dB gain compression point) of 19.2 dBm and a PAE of 39.0 %.
AB - This paper presents a highly linear 28-GHz band SOI CMOS power amplifier with an adaptive bias circuit for cascode MOSFET for next generation wireless communication. The power amplifier consists of a cascode MOSFET, the adaptive bias circuit and the input and output matching circuits. The power amplifier has exhibited a simulated output P1dB (1-dB gain compression point) of 19.2 dBm and a PAE of 39.0 %.
KW - Adaptive bias circuit
KW - Linear power amplifier
KW - SOI CMOS
UR - http://www.scopus.com/inward/record.url?scp=85043463937&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85043463937&partnerID=8YFLogxK
U2 - 10.1109/EDSSC.2017.8126403
DO - 10.1109/EDSSC.2017.8126403
M3 - Conference contribution
AN - SCOPUS:85043463937
T3 - EDSSC 2017 - 13th IEEE International Conference on Electron Devices and Solid-State Circuits
SP - 1
EP - 2
BT - EDSSC 2017 - 13th IEEE International Conference on Electron Devices and Solid-State Circuits
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 13th IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2017
Y2 - 18 October 2017 through 20 October 2017
ER -