A 4320MIPS four-processor core SMP/AMP with individually managed clock frequency for low power consumption

Yutaka Yoshida; Tatsuya Kamei; Kiyoshi Hayase; Shinichi Shibahara; Osamu Nishii; Toshihiro Hattori; Atsushi Hasegawa; Masashi Takada; Naohiko Irie; Kunio Uchiyama; Toshihiko Odaka; Kiwamu Takada; Keiji Kimura; Hironori Kasahara

doi:10.1109/ISSCC.2007.373607

A 4320MIPS four-processor core SMP/AMP with individually managed clock frequency for low power consumption

Yutaka Yoshida^*, Tatsuya Kamei, Kiyoshi Hayase, Shinichi Shibahara, Osamu Nishii, Toshihiro Hattori, Atsushi Hasegawa, Masashi Takada, Naohiko Irie, Kunio Uchiyama, Toshihiko Odaka, Kiwamu Takada, Keiji Kimura, Hironori Kasahara

^*この研究の対応する著者

基幹理工学部

研究成果: Conference contribution

26 被引用数 (Scopus)

抄録

A 4320MIPS four-core SoC that supports both SMP and AMP for embedded applications is designed in 90nm CMOS. Each processor-core can be operated with a different frequency dynamically including clock stop, while keeping data cache coherency, to maintain maximum processing performance and to reduce average operating power. The 97.6mm² die achieves a floating-point performance of 16.8GFLOPS.

本文言語	English
ホスト出版物のタイトル	2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers
ページ	100-101+590+95
DOI	https://doi.org/10.1109/ISSCC.2007.373607
出版ステータス	Published - 2007 9月 27
イベント	54th IEEE International Solid-State Circuits Conference, ISSCC 2007 - San Francisco, CA, United States 継続期間: 2007 2月 11 → 2007 2月 15

出版物シリーズ

名前	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
ISSN（印刷版）	0193-6530

Other

Other	54th IEEE International Solid-State Circuits Conference, ISSCC 2007
国/地域	United States
City	San Francisco, CA
Period	07/2/11 → 07/2/15

ASJC Scopus subject areas

電子材料、光学材料、および磁性材料
電子工学および電気工学

文献へのアクセス

10.1109/ISSCC.2007.373607

他のファイルとリンク

引用スタイル

Yoshida, Y., Kamei, T., Hayase, K., Shibahara, S., Nishii, O., Hattori, T., Hasegawa, A., Takada, M., Irie, N., Uchiyama, K., Odaka, T., Takada, K., Kimura, K., & Kasahara, H. (2007). A 4320MIPS four-processor core SMP/AMP with individually managed clock frequency for low power consumption. In 2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers (pp. 100-101+590+95). [4242284] (Digest of Technical Papers - IEEE International Solid-State Circuits Conference). https://doi.org/10.1109/ISSCC.2007.373607

A 4320MIPS four-processor core SMP/AMP with individually managed clock frequency for low power consumption. / Yoshida, Yutaka; Kamei, Tatsuya; Hayase, Kiyoshi その他.
2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. 2007. p. 100-101+590+95 4242284 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

研究成果: Conference contribution

Yoshida, Y, Kamei, T, Hayase, K, Shibahara, S, Nishii, O, Hattori, T, Hasegawa, A, Takada, M, Irie, N, Uchiyama, K, Odaka, T, Takada, K, Kimura, K & Kasahara, H 2007, A 4320MIPS four-processor core SMP/AMP with individually managed clock frequency for low power consumption. in 2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers., 4242284, Digest of Technical Papers - IEEE International Solid-State Circuits Conference, pp. 100-101+590+95, 54th IEEE International Solid-State Circuits Conference, ISSCC 2007, San Francisco, CA, United States, 07/2/11. https://doi.org/10.1109/ISSCC.2007.373607

Yoshida Y, Kamei T, Hayase K, Shibahara S, Nishii O, Hattori T その他. A 4320MIPS four-processor core SMP/AMP with individually managed clock frequency for low power consumption. In 2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. 2007. p. 100-101+590+95. 4242284. (Digest of Technical Papers - IEEE International Solid-State Circuits Conference). doi: 10.1109/ISSCC.2007.373607

Yoshida, Yutaka ; Kamei, Tatsuya ; Hayase, Kiyoshi その他. / A 4320MIPS four-processor core SMP/AMP with individually managed clock frequency for low power consumption. 2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers. 2007. pp. 100-101+590+95 (Digest of Technical Papers - IEEE International Solid-State Circuits Conference).

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A 4320MIPS four-processor core SMP/AMP with individually managed clock frequency for low power consumption

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出版物シリーズ

Other

ASJC Scopus subject areas

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