@inproceedings{7b29c0133336449d9633bbd4d06d3621,
title = "A 45nm low-standby-power embedded SRAM with improved immunity against process and temperature variations",
abstract = "A 512kb SRAM module is implemented in a 45nm low-standby-power CMOS with variation-tolerant assist circuits against process and temperature. A passive resistance is introduced to the read assist circuit and a divided VDD line is adopted in the memory array to assist the write. Two SRAM cells with areas of 0.245μm2 and 0.327μm2 are fabricated. Measurements show that the SNM exceeds 120mV and the write margin improves by 15% in the worst PVT condition.",
author = "Makoto Yabuuchi and Koji Nii and Yasumasa Tsukamoto and Shigeki Ohbayashi and Susumu Imaoka and Hiroshi Makino and Yoshinobu Yamagami and Satoshi Ishikura and Toshio Terano and Toshiyuki Oashi and Keiji Hashimoto and Akio Sebe and Gen Okazaki and Katsuji Satomi and Hironori Akamatsu and Hirofumi Shinohara",
year = "2007",
doi = "10.1109/ISSCC.2007.373426",
language = "English",
isbn = "1424408539",
series = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",
pages = "326--327+606+321",
booktitle = "2007 IEEE International Solid-State Circuits Conference, ISSCC - Digest of Technical Papers",
note = "54th IEEE International Solid-State Circuits Conference, ISSCC 2007 ; Conference date: 11-02-2007 Through 15-02-2007",
}