TY - JOUR
T1 - A 600MIPS 120mW 70μA leakage triple-CPU mobile application processor chip
AU - Torii, S.
AU - Suzuki, S.
AU - Tomonaga, H.
AU - Tokue, T.
AU - Sakai, J.
AU - Suzuki, N.
AU - Murakami, K.
AU - Hiraga, T.
AU - Shigemoto, K.
AU - Tatebe, Y.
AU - Ohbuchi, E.
AU - Kayama, N.
AU - Edahiro, M.
AU - Kusano, T.
AU - Nishi, N.
PY - 2005
Y1 - 2005
N2 - A triple-CPU mobile application processor is developed on an 8.95mm×8.95mm die in a 0.1μm CMOS process. The IC integrates 3×ARM926 cores, a DSP, several accelerators, as well as strong bus and memory interfaces. It consumes 120mW for digital TV, web browser, and 3D graphics, and 250mW@200MHz for 600MIPS with full processing.
AB - A triple-CPU mobile application processor is developed on an 8.95mm×8.95mm die in a 0.1μm CMOS process. The IC integrates 3×ARM926 cores, a DSP, several accelerators, as well as strong bus and memory interfaces. It consumes 120mW for digital TV, web browser, and 3D graphics, and 250mW@200MHz for 600MIPS with full processing.
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UR - http://www.scopus.com/inward/citedby.url?scp=28144446795&partnerID=8YFLogxK
M3 - Conference article
AN - SCOPUS:28144446795
SN - 0193-6530
VL - 48
SP - 102-103+553
JO - Digest of Technical Papers - IEEE International Solid-State Circuits Conference
JF - Digest of Technical Papers - IEEE International Solid-State Circuits Conference
M1 - 7.5
T2 - 2005 IEEE International Solid-State Circuits Conference, ISSCC
Y2 - 6 February 2005 through 10 February 2005
ER -