TY - GEN
T1 - A Fault-tolerant Hamiltonian-based Odd-Even Routing algorithm for Network-on-chip
AU - Hu, Cheng
AU - Conrad Meyer, Michael
AU - Jiang, Xin
AU - Watanabe, Takahiro
N1 - Funding Information:
This work is partly supported by JSPS KAKENHI Grant Number 18K11226, Waseda University Tokutei-Kadai 2019C-289, and Int’l Sci. Tech. Cooperation Projects (No.BZ2018031).
Publisher Copyright:
© 2020 IEICE.
PY - 2020/7
Y1 - 2020/7
N2 - Network-on-chip (NoC) has emerged as an efficient communication method for Multi-Processor System-on-chips (MPSoCs). With the integration density increasing, there is more possibility that NoC is threaten by different faults in the network. In this paper, we propose a new fault-tolerant routing algorithm which takes advantage of improved Hamiltonian-based Odd-Even turn model and trys to reutilize some prohibited minimal paths. We configure our algorithm into adaptive and deterministic routings and unite them with an existing traffic-pattern detection mechanism to get a better performance in latency and throughput in different traffic patterns.
AB - Network-on-chip (NoC) has emerged as an efficient communication method for Multi-Processor System-on-chips (MPSoCs). With the integration density increasing, there is more possibility that NoC is threaten by different faults in the network. In this paper, we propose a new fault-tolerant routing algorithm which takes advantage of improved Hamiltonian-based Odd-Even turn model and trys to reutilize some prohibited minimal paths. We configure our algorithm into adaptive and deterministic routings and unite them with an existing traffic-pattern detection mechanism to get a better performance in latency and throughput in different traffic patterns.
KW - Hamiltonian path
KW - Networks-on-Chip (NoC)
KW - fault-tolerant routing
KW - traffic pattern
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M3 - Conference contribution
AN - SCOPUS:85091447338
T3 - ITC-CSCC 2020 - 35th International Technical Conference on Circuits/Systems, Computers and Communications
SP - 217
EP - 222
BT - ITC-CSCC 2020 - 35th International Technical Conference on Circuits/Systems, Computers and Communications
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 35th International Technical Conference on Circuits/Systems, Computers and Communications, ITC-CSCC 2020
Y2 - 3 July 2020 through 6 July 2020
ER -