A gate-current model for advanced MOSFET technologies implemented into HiSIM2

Ryosuke Inagaki; Norio Sadachika; Dondee Navarro; Mitiko Miura-Mattausch; Yasuaki Inoue

doi:10.1002/tee.20235

A gate-current model for advanced MOSFET technologies implemented into HiSIM2

Ryosuke Inagaki^*, Norio Sadachika, Dondee Navarro, Mitiko Miura-Mattausch, Yasuaki Inoue

^*この研究の対応する著者

研究成果: Article › 査読

2 被引用数 (Scopus)

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A gate leakage current model for advanced MOSFETs has been developed and implemented into the Hiroshima-university STARC IGFET Model (HiSIM), the first complete surface-potential-based model. The model consists of four tunneling mechanisms, the gate to channel/bulk/source/drain, and requires totally 15 model parameters covering all bias conditions. Simulation results reproduce measurement for any device size and temperature without binning. Validity of the model has been tested with circuits that are sensitive to the change of stored charge due to tunneling current.

本文言語	English
ページ（範囲）	64-71
ページ数	8
ジャーナル	IEEJ Transactions on Electrical and Electronic Engineering
巻	3
号	1
DOI	https://doi.org/10.1002/tee.20235
出版ステータス	Published - 2008 1月

ASJC Scopus subject areas

電子工学および電気工学

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10.1002/tee.20235

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T1 - A gate-current model for advanced MOSFET technologies implemented into HiSIM2

AU - Inagaki, Ryosuke

AU - Sadachika, Norio

AU - Navarro, Dondee

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AU - Inoue, Yasuaki

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A gate-current model for advanced MOSFET technologies implemented into HiSIM2

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