抄録
A GIDL (Gate Induced Drain Leakage) current model for advanced MOSFETs has been proposed and implemented into HiSIM2, first complete surface potential based model. The model consists of one tunneling mechanism considering two tunneling currents, band to band tunneling (BTBT) and trap assisted tunneling (TAT), and requires totally 7 model parameters covering all bias conditions. Simulation results of NFETs and PFETs reproduce measurements for any device size without binning. Validity of the model has been tested with a circuit, which is sensitive to the change of the stored charge due to tunneling current.
| 本文言語 | English |
|---|---|
| ホスト出版物のタイトル | ICCCAS 2007 - International Conference on Communications, Circuits and Systems 2007 |
| ページ | 1057-1061 |
| ページ数 | 5 |
| 出版ステータス | Published - 2008 |
| イベント | ICCCAS 2007 - International Conference on Communications, Circuits and Systems 2007 - Kokura 継続期間: 2007 7月 11 → 2007 7月 13 |
Other
| Other | ICCCAS 2007 - International Conference on Communications, Circuits and Systems 2007 |
|---|---|
| City | Kokura |
| Period | 07/7/11 → 07/7/13 |
ASJC Scopus subject areas
- 電子工学および電気工学