A hardware/software co-solution to achieving high throughput required by motion estimation part in H.264/AVC HDTV real-time application

Zhenxing Chen; Takeshi Ikenaga; Satoshi Goto

doi:10.1109/VDAT.2008.4542429

A hardware/software co-solution to achieving high throughput required by motion estimation part in H.264/AVC HDTV real-time application

Zhenxing Chen^*, Takeshi Ikenaga, Satoshi Goto

^*この研究の対応する著者

大学院情報生産システム研究科

研究成果: Conference contribution

5 被引用数 (Scopus)

抄録

The high throughput required by Motion Estimation (ME) part in H.264/AVC High Definition TV (HDTV) real-time application is very difficult to achieve. Currently one kind of the solutions to this problem is multipling the processing element (PE) array to construct redundant PE array structure. Although redundant structure can take adavantages of parallel processing to achieve high throughput, meanwhile it bring in linear increasing of hardware cost. In this paper, a hardware/software co-solusion is proposed to achieve the required throughput of ME part in H.264/AVC HDTV realtime application. In software side, one adaptive search range (ASR) algorithm which is previously proposed by us [12] is firstly introduced and then experimentally proved can improve the throughput 11.48 times averagely in HDTV1080p video sequence. In hardware side, a previously proposed architecture called SAD-tree [17] is firstly introduced. Then based on this architecture, optimization that increase the frequence is proposed. The hardware implementing result of the optimized architecure shows the proposed optimization can triple the frequence. Finally, it is illustrated that the hardware/software co-solution can help to achieve the required throughput.

本文言語	English
ホスト出版物のタイトル	2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT
ページ	128-131
ページ数	4
DOI	https://doi.org/10.1109/VDAT.2008.4542429
出版ステータス	Published - 2008 9月 5
イベント	2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT - Hsinchu, Taiwan, Province of China 継続期間: 2008 4月 23 → 2008 4月 25

出版物シリーズ

名前	2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT

Conference

Conference	2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT
国/地域	Taiwan, Province of China
City	Hsinchu
Period	08/4/23 → 08/4/25

ASJC Scopus subject areas

ハードウェアとアーキテクチャ
電子工学および電気工学

文献へのアクセス

10.1109/VDAT.2008.4542429

他のファイルとリンク

フィンガープリント

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引用スタイル

Chen, Z., Ikenaga, T., & Goto, S. (2008). A hardware/software co-solution to achieving high throughput required by motion estimation part in H.264/AVC HDTV real-time application. In 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT (pp. 128-131). 記事 4542429 (2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT). https://doi.org/10.1109/VDAT.2008.4542429

A hardware/software co-solution to achieving high throughput required by motion estimation part in H.264/AVC HDTV real-time application. / Chen, Zhenxing; Ikenaga, Takeshi; Goto, Satoshi.
2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT. 2008. p. 128-131 4542429 (2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT).

研究成果: Conference contribution

Chen, Z, Ikenaga, T & Goto, S 2008, A hardware/software co-solution to achieving high throughput required by motion estimation part in H.264/AVC HDTV real-time application. in 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT., 4542429, 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT, pp. 128-131, 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT, Hsinchu, Taiwan, Province of China, 08/4/23. https://doi.org/10.1109/VDAT.2008.4542429

Chen Z, Ikenaga T, Goto S. A hardware/software co-solution to achieving high throughput required by motion estimation part in H.264/AVC HDTV real-time application. In 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT. 2008. p. 128-131. 4542429. (2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT). doi: 10.1109/VDAT.2008.4542429

@inproceedings{ce1a484933654a57a00db894b6be02f2,

title = "A hardware/software co-solution to achieving high throughput required by motion estimation part in H.264/AVC HDTV real-time application",

abstract = "The high throughput required by Motion Estimation (ME) part in H.264/AVC High Definition TV (HDTV) real-time application is very difficult to achieve. Currently one kind of the solutions to this problem is multipling the processing element (PE) array to construct redundant PE array structure. Although redundant structure can take adavantages of parallel processing to achieve high throughput, meanwhile it bring in linear increasing of hardware cost. In this paper, a hardware/software co-solusion is proposed to achieve the required throughput of ME part in H.264/AVC HDTV realtime application. In software side, one adaptive search range (ASR) algorithm which is previously proposed by us [12] is firstly introduced and then experimentally proved can improve the throughput 11.48 times averagely in HDTV1080p video sequence. In hardware side, a previously proposed architecture called SAD-tree [17] is firstly introduced. Then based on this architecture, optimization that increase the frequence is proposed. The hardware implementing result of the optimized architecure shows the proposed optimization can triple the frequence. Finally, it is illustrated that the hardware/software co-solution can help to achieve the required throughput.",

keywords = "ASR, ME, Required throughput, SAD-tree",

author = "Zhenxing Chen and Takeshi Ikenaga and Satoshi Goto",

year = "2008",

month = sep,

day = "5",

doi = "10.1109/VDAT.2008.4542429",

language = "English",

isbn = "9781424416172",

series = "2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT",

pages = "128--131",

booktitle = "2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT",

note = "2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT ; Conference date: 23-04-2008 Through 25-04-2008",

}

TY - GEN

T1 - A hardware/software co-solution to achieving high throughput required by motion estimation part in H.264/AVC HDTV real-time application

AU - Chen, Zhenxing

AU - Ikenaga, Takeshi

AU - Goto, Satoshi

PY - 2008/9/5

Y1 - 2008/9/5

N2 - The high throughput required by Motion Estimation (ME) part in H.264/AVC High Definition TV (HDTV) real-time application is very difficult to achieve. Currently one kind of the solutions to this problem is multipling the processing element (PE) array to construct redundant PE array structure. Although redundant structure can take adavantages of parallel processing to achieve high throughput, meanwhile it bring in linear increasing of hardware cost. In this paper, a hardware/software co-solusion is proposed to achieve the required throughput of ME part in H.264/AVC HDTV realtime application. In software side, one adaptive search range (ASR) algorithm which is previously proposed by us [12] is firstly introduced and then experimentally proved can improve the throughput 11.48 times averagely in HDTV1080p video sequence. In hardware side, a previously proposed architecture called SAD-tree [17] is firstly introduced. Then based on this architecture, optimization that increase the frequence is proposed. The hardware implementing result of the optimized architecure shows the proposed optimization can triple the frequence. Finally, it is illustrated that the hardware/software co-solution can help to achieve the required throughput.

AB - The high throughput required by Motion Estimation (ME) part in H.264/AVC High Definition TV (HDTV) real-time application is very difficult to achieve. Currently one kind of the solutions to this problem is multipling the processing element (PE) array to construct redundant PE array structure. Although redundant structure can take adavantages of parallel processing to achieve high throughput, meanwhile it bring in linear increasing of hardware cost. In this paper, a hardware/software co-solusion is proposed to achieve the required throughput of ME part in H.264/AVC HDTV realtime application. In software side, one adaptive search range (ASR) algorithm which is previously proposed by us [12] is firstly introduced and then experimentally proved can improve the throughput 11.48 times averagely in HDTV1080p video sequence. In hardware side, a previously proposed architecture called SAD-tree [17] is firstly introduced. Then based on this architecture, optimization that increase the frequence is proposed. The hardware implementing result of the optimized architecure shows the proposed optimization can triple the frequence. Finally, it is illustrated that the hardware/software co-solution can help to achieve the required throughput.

KW - ASR

KW - ME

KW - Required throughput

KW - SAD-tree

UR - http://www.scopus.com/inward/record.url?scp=50649109844&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=50649109844&partnerID=8YFLogxK

U2 - 10.1109/VDAT.2008.4542429

DO - 10.1109/VDAT.2008.4542429

M3 - Conference contribution

AN - SCOPUS:50649109844

SN - 9781424416172

T3 - 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT

SP - 128

EP - 131

BT - 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT

T2 - 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT

Y2 - 23 April 2008 through 25 April 2008

ER -