A highly reliable gate/n- overlapped transistor for mega-bit DRAMs

M. Nagatomo*, Y. Okumura, K. Mitsui, I. Ogoh, H. Genjoh, M. Inuishi, T. Matsukawa

*この研究の対応する著者

研究成果: Conference contribution

2 被引用数 (Scopus)

抄録

A noble gate/N- overlapped Tr. fabricated using oblique rotating ion implantation technique was developed. It is confirmed that this Tr. meets high performance M bit DRAMs' requirements, that is, high drain current, enough punchthrough voltage and low substrate current. The mechanism of this Tr.'s action is analyzed by simulation and is concluded that peak position of electric field is located far from the drain current pass in this Tr.'s structure. The maximum electric field is also relaxed by formation of N- layer using oblique ion implantation.

本文言語English
ホスト出版物のタイトルESSDERC 1989 - Proceedings of the 19th European Solid State Device Research Conference
編集者Anton Heuberger, Heiner Ryssel, Peter Lange
出版社IEEE Computer Society
ページ923-926
ページ数4
ISBN(電子版)0387510001
ISBN(印刷版)9780387510002
DOI
出版ステータスPublished - 1989 1月 1
外部発表はい
イベント19th European Solid State Device Research Conference, ESSDERC 1989 - Berlin, Germany
継続期間: 1989 9月 111989 9月 14

出版物シリーズ

名前European Solid-State Device Research Conference
ISSN(印刷版)1930-8876

Other

Other19th European Solid State Device Research Conference, ESSDERC 1989
国/地域Germany
CityBerlin
Period89/9/1189/9/14

ASJC Scopus subject areas

  • 電子工学および電気工学
  • 安全性、リスク、信頼性、品質管理

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