抄録
Owing to the huge bandwidth requirement, the DRAM power composes a significant portion of the power consumed by video coding system. In this paper, a lossless frame recompression scheme for reducing DRAM bandwidth is presented. The basic structure of the scheme which includes the memory organization, the data fetching strategy as well as the cache organization is proposed. Furthermore, an adaptive DPCM (Differential Pulse Code Modulation) scanning order selection is used and an efficient coding method that is suitable for compressing the DPCM samples in reference frames is also discussed. Experimental results show a 50%~60% saving of bandwidth on 720p and 1080p sequences, which indicates that the proposed scheme can be useful in reducing the system power through saving DRAM bandwidth.
| 本文言語 | English |
|---|---|
| ホスト出版物のタイトル | ISCAS 2010 - 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems |
| ページ | 677-680 |
| ページ数 | 4 |
| DOI | |
| 出版ステータス | Published - 2010 |
| イベント | 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010 - Paris 継続期間: 2010 5月 30 → 2010 6月 2 |
Other
| Other | 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010 |
|---|---|
| City | Paris |
| Period | 10/5/30 → 10/6/2 |
ASJC Scopus subject areas
- ハードウェアとアーキテクチャ
- 電子工学および電気工学