A novel hardware method to implement a routing algorithm onto network on chip

Yiping Dong; Hua Zhang; Zhen Lin; Takahiro Watanabe

doi:10.1109/ICCCAS.2010.5581857

A novel hardware method to implement a routing algorithm onto network on chip

Yiping Dong^*, Hua Zhang, Zhen Lin, Takahiro Watanabe

^*この研究の対応する著者

大学院情報生産システム研究科

研究成果: Conference contribution

抄録

Recently, a Network on Chip (NoC) has attracted much attention for its smart structure and high performance. However, NoC routing algorithms significantly influences the performance and design cost. In this paper, a new hardware method to implement a routing algorithm is proposed. The proposed method is used to replace the general destination-tag method for router design. We simulate and evaluate the router and NoC with proposed method in terms of circuit resource, latency and throughput. The results indicate that the NoC architecture with proposed method is effective in reducing circuit resource, latency and increasing throughput.

本文言語	English
ホスト出版物のタイトル	2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010 - Proceedings
ページ	852-856
ページ数	5
DOI	https://doi.org/10.1109/ICCCAS.2010.5581857
出版ステータス	Published - 2010 11月 19
イベント	2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010 - Chengdu, China 継続期間: 2010 7月 28 → 2010 7月 30

出版物シリーズ

名前	2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010 - Proceedings

Conference

Conference	2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010
国/地域	China
City	Chengdu
Period	10/7/28 → 10/7/30

ASJC Scopus subject areas

ハードウェアとアーキテクチャ
電子工学および電気工学

文献へのアクセス

10.1109/ICCCAS.2010.5581857

他のファイルとリンク

引用スタイル

Dong, Y., Zhang, H., Lin, Z., & Watanabe, T. (2010). A novel hardware method to implement a routing algorithm onto network on chip. In 2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010 - Proceedings (pp. 852-856). [5581857] (2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010 - Proceedings). https://doi.org/10.1109/ICCCAS.2010.5581857

A novel hardware method to implement a routing algorithm onto network on chip. / Dong, Yiping; Zhang, Hua; Lin, Zhen その他.
2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010 - Proceedings. 2010. p. 852-856 5581857 (2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010 - Proceedings).

研究成果: Conference contribution

Dong, Y, Zhang, H, Lin, Z & Watanabe, T 2010, A novel hardware method to implement a routing algorithm onto network on chip. in 2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010 - Proceedings., 5581857, 2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010 - Proceedings, pp. 852-856, 2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010, Chengdu, China, 10/7/28. https://doi.org/10.1109/ICCCAS.2010.5581857

Dong Y, Zhang H, Lin Z, Watanabe T. A novel hardware method to implement a routing algorithm onto network on chip. In 2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010 - Proceedings. 2010. p. 852-856. 5581857. (2010 International Conference on Communications, Circuits and Systems, ICCCAS 2010 - Proceedings). doi: 10.1109/ICCCAS.2010.5581857

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AB - Recently, a Network on Chip (NoC) has attracted much attention for its smart structure and high performance. However, NoC routing algorithms significantly influences the performance and design cost. In this paper, a new hardware method to implement a routing algorithm is proposed. The proposed method is used to replace the general destination-tag method for router design. We simulate and evaluate the router and NoC with proposed method in terms of circuit resource, latency and throughput. The results indicate that the NoC architecture with proposed method is effective in reducing circuit resource, latency and increasing throughput.

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A novel hardware method to implement a routing algorithm onto network on chip

抄録

出版物シリーズ

Conference

ASJC Scopus subject areas

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