As the technology of semiconductor continues to develop, hundreds of cores will be deployed on a signal die in the future Chip-Multiprocessors (CMPs) design. So Three-Dimensional Network-on-Chips (3D NoCs) has become an attractive solution which can provide high performance. The network performance depends critically on the performance of routing algorithm. This paper proposes a novel adaptive routing in 3D NoC which can solve congestion not only in the intra-layers but also in inter-layers. Simulation results show that our proposed method significantly achieves the performance improvement compared with other transitional routing algorithms.
|IEEE Region 10 Annual International Conference, Proceedings/TENCON
|Institute of Electrical and Electronics Engineers Inc.
|Published - 2016 1月 5
|35th IEEE Region 10 Conference, TENCON 2015 - Macau, Macao
継続期間: 2015 11月 1 → 2015 11月 4
|35th IEEE Region 10 Conference, TENCON 2015
|15/11/1 → 15/11/4
ASJC Scopus subject areas
- コンピュータ サイエンスの応用