@inproceedings{82ffa79eca2f4156bf64ec103cd48b72,
title = "A power-gated MPU with 3-microsecond entry/exit delay using MTJ-based nonvolatile flip-flop",
abstract = "We propose a novel power-gated microprocessor unit (MPU) using a nonvolatile flip-flop (NV-F/F) with magnetic tunnel junction (MTJ). By using the NV-F/F to store the MPU's internal state, this MPU realizes power-gating operation with a small 3-microsecond entry/exit delay penalty in power-on/power-off, which is one order of magnitude faster than a conventional MPU's deep power down mode. To achieve this short entry/exit delay, an appropriate NV-F/F circuit, which can perform stable high speed store/recall operations, has been developed. The MPU will help in the realization of low power systems because of its easy controllability for the power gating mode.",
keywords = "Flip-flop, MPU, MTJ, Nonvolatile, Power gating",
author = "H. Koike and T. Ohsawa and S. Ikeda and T. Hanyu and H. Ohno and T. Endoh and N. Sakimura and R. Nebashi and Y. Tsuji and A. Morioka and S. Miura and H. Honjo and T. Sugibayashi",
year = "2013",
month = dec,
day = "1",
doi = "10.1109/ASSCC.2013.6691046",
language = "English",
isbn = "9781479902781",
series = "Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013",
pages = "317--320",
booktitle = "Proceedings of the 2013 IEEE Asian Solid-State Circuits Conference, A-SSCC 2013",
note = "2013 9th IEEE Asian Solid-State Circuits Conference, A-SSCC 2013 ; Conference date: 11-11-2013 Through 13-11-2013",
}