抄録
Recently, digital ICs are often designed by outside vendors to reduce design costs in semiconductor industry, which may introduce severe risks that malicious attackers implement Hardware Trojans (HTs) on them. Since IC design phase generates only a single design result, an RT-level or gate-level netlist for example, we cannot assume an HT-free netlist or a Golden netlist and then it is too difficult to identify whether a generated netlist is HT-free or HT-inserted. In this paper, we propose a score-based classification method for identifying HT-free or HT-inserted gate-level netlists without using a Golden netlist. Our proposed method does not directly detect HTs themselves in a gate-level netlist but a net included in HTs, which is called Trojan net, instead. Firstly, we observe Trojan nets from several HT-inserted benchmarks and extract several their features. Secondly, we give scores to extracted Trojan net features and sum up them for each net in benchmarks. Then we can find out a score threshold to classify HT-free and HT-inserted netlists. Based on these scores, we can successfully classify HT-free and HT-inserted netlists in all the Trust-HUB gate-level benchmarks. Experimental results demonstrate that our method successfully identify all the HT-inserted gate-level benchmarks to be 'HT-inserted' and all the HT-free gate-level benchmarks to be 'HT-free' in approximately three hours for each benchmark.
本文言語 | English |
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ホスト出版物のタイトル | Proceedings -Design, Automation and Test in Europe, DATE |
出版社 | Institute of Electrical and Electronics Engineers Inc. |
ページ | 465-470 |
ページ数 | 6 |
巻 | 2015-April |
ISBN(印刷版) | 9783981537048 |
出版ステータス | Published - 2015 4月 22 |
イベント | 2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015 - Grenoble, France 継続期間: 2015 3月 9 → 2015 3月 13 |
Other
Other | 2015 Design, Automation and Test in Europe Conference and Exhibition, DATE 2015 |
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国/地域 | France |
City | Grenoble |
Period | 15/3/9 → 15/3/13 |
ASJC Scopus subject areas
- 工学(全般)