A sorting-based IO connection assignment for flip-chip designs

Ran Zhang, Xue Wei, Takahiro Watanabe

研究成果: Conference contribution

5 被引用数 (Scopus)

抄録

In modern VLSI designs, flip-chip package is widely used to meet the higher integration density and the larger IO counts of circuits. Recently the IO buffers are mapped onto bump balls without changing the placement using re-distribution layer (RDL) in flip-chip designs. In this research, a sorting-based IO connection assignment for flip-chip designs is proposed to reduce the total wire length. The proposed method initially assigns the IO buffers to bump balls by sorting the Manhattan Distance between them, and then takes some pair-exchanges to modify the assignment. The experimental results show that compared with another partitioning-based IO assignment method, our proposed method can reduce the wire length by 12.94% on the average, at the expense of a little time consumption.

本文言語English
ホスト出版物のタイトル2013 IEEE 10th International Conference on ASIC, ASICON 2013
出版社IEEE Computer Society
ISBN(印刷版)9781467364157
DOI
出版ステータスPublished - 2013 1月 1
イベント2013 IEEE 10th International Conference on ASIC, ASICON 2013 - Shenzhen, China
継続期間: 2013 10月 282013 10月 31

出版物シリーズ

名前Proceedings of International Conference on ASIC
ISSN(印刷版)2162-7541
ISSN(電子版)2162-755X

Other

Other2013 IEEE 10th International Conference on ASIC, ASICON 2013
国/地域China
CityShenzhen
Period13/10/2813/10/31

ASJC Scopus subject areas

  • ハードウェアとアーキテクチャ
  • 電子工学および電気工学

フィンガープリント

「A sorting-based IO connection assignment for flip-chip designs」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル