抄録
A new circuit structure for a CMOS four-quadrant analog multiplier is presented. In this circuit, the active feedback technique is used to obtain high linearity and wide input dynamic range. The simulation results show that the proposed multiplier can offer ±1.8V input dynamic range for a ±2.5V supply voltage, which is much larger than the conventional CMOS analog multipliers.
本文言語 | English |
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ホスト出版物のタイトル | IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS |
ページ | 708-711 |
ページ数 | 4 |
DOI | |
出版ステータス | Published - 2006 |
イベント | APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems - 継続期間: 2006 12月 4 → 2006 12月 6 |
Other
Other | APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems |
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Period | 06/12/4 → 06/12/6 |
ASJC Scopus subject areas
- 工学(全般)