This paper presents a digital predistorter with a wideband memory effect compensator for a Doherty power amplifier (PA). A simple memory-predistortion model, which consists of a look-up-table (LUT) and an adaptive filter equalizing memory effects, and a new memory effect estimation algorithm using a direct-learning architecture are proposed. The proposed estimation algorithm has an advantage that a transfer function of a feedback circuit does not affect the learning process. The pre-distorter is implemented in a field programmable gate array (FPGA) and a digital signal processor (DSP). The transmitter has achieved distortion level of -50.8 dBr at signal bandwidth away from the carrier, and PA module efficiency of 24% with output power of 43 dBm at 2595 MHz under a 20 MHz-bandwidth orthogonal frequency division multiplexing (OFDM) signal using laterally diffused metal oxide semiconductor (LDMOS) FETs. Copyright copy; 2010 The Institute of Electronics, Information and Communication Engineers.
|ジャーナル||IEICE Transactions on Electronics|
|出版ステータス||Published - 2010 7月|
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