TY - JOUR
T1 - Advanced ion implantation and rapid thermal annealing technologies for highly reliable 0.25μm dual gate CMOS
AU - Shimizu, S.
AU - Kuroi, T.
AU - Kawasaki, Y.
AU - Tsutsumi, T.
AU - Oda, H.
AU - Inuishi, M.
AU - Miyoshi, H.
PY - 1996
Y1 - 1996
N2 - Advanced ion implantation and rapid thermal annealing technologies are proposed to realize highly reliable 0.25μm salicided dual gate CMOS for high performance logic application. These technologies mainly consist of mixing the CoSi2/Si interface using silicon implantation, CVD-Si3N4/CVD-SiO2 sidewall spacer, nitrogen implantation in gate polysilicon and source/drain regions and rapid thermal annealing (RTA) for reduction of thermal budget.
AB - Advanced ion implantation and rapid thermal annealing technologies are proposed to realize highly reliable 0.25μm salicided dual gate CMOS for high performance logic application. These technologies mainly consist of mixing the CoSi2/Si interface using silicon implantation, CVD-Si3N4/CVD-SiO2 sidewall spacer, nitrogen implantation in gate polysilicon and source/drain regions and rapid thermal annealing (RTA) for reduction of thermal budget.
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M3 - Conference article
AN - SCOPUS:0029723679
SN - 0743-1562
SP - 64
EP - 65
JO - Digest of Technical Papers - Symposium on VLSI Technology
JF - Digest of Technical Papers - Symposium on VLSI Technology
T2 - Proceedings of the 1996 Symposium on VLSI Technology
Y2 - 11 June 1996 through 13 June 1996
ER -