An effecient level-shifter floorplanning method for multi-voltage design

Xiaolin Zhang*, Zhi Lin, Song Chen, Takeshi Yoshimura

*この研究の対応する著者

研究成果: Conference contribution

6 被引用数 (Scopus)

抄録

Nowdays, Low-power design, especially Multi-voltage design becomes a popular and efficient way to reduce both dynamic power and static power. In this paper, we propose an efficient method of level-shifter floorplanning for a given multi-voltage design. This method is a two stage optimization method. First, for a given voltage island and its sequence pair representation, we greedily pre-place level-shifters into white-spaces of multi-voltage island based sequence-pair representation. Then, we employ a modified IARFP [1] algorithm to re-optimize the positions of level-shifters. Experimental results show that, the proposed two stage level-shifter floorplanner is efficient for post multi-voltage island optimization.

本文言語English
ホスト出版物のタイトルProceedings of International Conference on ASIC
ページ421-424
ページ数4
DOI
出版ステータスPublished - 2011
イベント2011 IEEE 9th International Conference on ASIC, ASICON 2011 - Xiamen
継続期間: 2011 10月 252011 10月 28

Other

Other2011 IEEE 9th International Conference on ASIC, ASICON 2011
CityXiamen
Period11/10/2511/10/28

ASJC Scopus subject areas

  • ハードウェアとアーキテクチャ
  • 電子工学および電気工学

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