TY - JOUR
T1 - An optically clocked transistor array with dual serial-to-parallel and parallel-to-serial conversion capability for optical label swapping
AU - Urata, Ryohei
AU - Takahashi, Ryo
AU - Nakahara, Tatsushi
AU - Takahata, Kiyoto
AU - Suzuki, Hiroyuki
PY - 2006
Y1 - 2006
N2 - We propose an optically clocked transistor array optoclectronic integrated circuit (OEIC) for both serial-to-parallel and parallel-to-serial conversion (demux/mux), enabling an interface between high-speed asynchronous burst optical labels and CMOS circuitry for optical label swapping. Dual functionality of the OEIC reduces size, power, and cost of the optical label swapper. The capability for greater than 20-Gb/s conversion operation is demonstrated.
AB - We propose an optically clocked transistor array optoclectronic integrated circuit (OEIC) for both serial-to-parallel and parallel-to-serial conversion (demux/mux), enabling an interface between high-speed asynchronous burst optical labels and CMOS circuitry for optical label swapping. Dual functionality of the OEIC reduces size, power, and cost of the optical label swapper. The capability for greater than 20-Gb/s conversion operation is demonstrated.
KW - High-electron-mobility transistor (HEMT)
KW - Label recognition
KW - Label swapping
KW - Metal-semiconductor-metal (MSM)
KW - Optical packet switching
KW - Optoelectronic integrated circuit (OEIC)
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U2 - 10.1109/LPT.2005.860005
DO - 10.1109/LPT.2005.860005
M3 - Article
AN - SCOPUS:33947355497
SN - 1041-1135
VL - 18
SP - 67
EP - 69
JO - IEEE Photonics Technology Letters
JF - IEEE Photonics Technology Letters
IS - 1
ER -