An SoC based HW/SW co-design architecture for multi-standard audio decoding

Dajiang Zhou; Peilin Liu; Ji Kong; Yunfei Zhang; Bin He; Ning Deng

doi:10.1109/ASSCC.2007.4425765

An SoC based HW/SW co-design architecture for multi-standard audio decoding

Dajiang Zhou^*, Peilin Liu, Ji Kong, Yunfei Zhang, Bin He, Ning Deng

^*この研究の対応する著者

研究成果: Conference contribution

10 被引用数 (Scopus)

抄録

In this paper, we presented an SOC based HW/SW co-design architecture for multi-standard audio decoding. It is developed to support the audio standards of AAC LC profile, Dolby AC3, Ogg Vorbis, MPEG-1 Layer 3 (MP3) and Windows Media Audio (WMA). A VLSI reconfigurable filterbank based on CORDIC algorithm is developed to accelerate the multistandard decoding process. We designed and implemented an SOC platform to verify the filterbank as an IP core. Experimental result shows that the architecture is able to perform real-time audio decoding at low frequency (typically 10.6MHz for AAC and 11.3MHz for MP3) and the implementation cost is low (44.3k gates, 34k bytes RAM and 45k bytes data ROM for 5 audio standards). The architecture is also flexible for extending support of new formats and standards.

本文言語	English
ホスト出版物のタイトル	2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
ページ	200-203
ページ数	4
DOI	https://doi.org/10.1109/ASSCC.2007.4425765
出版ステータス	Published - 2007
外部発表	はい
イベント	2007 IEEE Asian Solid-State Circuits Conference, A-SSCC - Jeju 継続期間: 2007 11月 12 → 2007 11月 14

Other

Other	2007 IEEE Asian Solid-State Circuits Conference, A-SSCC
City	Jeju
Period	07/11/12 → 07/11/14

ASJC Scopus subject areas

ハードウェアとアーキテクチャ
電子工学および電気工学

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10.1109/ASSCC.2007.4425765

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引用スタイル

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title = "An SoC based HW/SW co-design architecture for multi-standard audio decoding",

abstract = "In this paper, we presented an SOC based HW/SW co-design architecture for multi-standard audio decoding. It is developed to support the audio standards of AAC LC profile, Dolby AC3, Ogg Vorbis, MPEG-1 Layer 3 (MP3) and Windows Media Audio (WMA). A VLSI reconfigurable filterbank based on CORDIC algorithm is developed to accelerate the multistandard decoding process. We designed and implemented an SOC platform to verify the filterbank as an IP core. Experimental result shows that the architecture is able to perform real-time audio decoding at low frequency (typically 10.6MHz for AAC and 11.3MHz for MP3) and the implementation cost is low (44.3k gates, 34k bytes RAM and 45k bytes data ROM for 5 audio standards). The architecture is also flexible for extending support of new formats and standards.",

author = "Dajiang Zhou and Peilin Liu and Ji Kong and Yunfei Zhang and Bin He and Ning Deng",

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AU - Liu, Peilin

AU - Kong, Ji

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AU - He, Bin

AU - Deng, Ning

PY - 2007

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An SoC based HW/SW co-design architecture for multi-standard audio decoding

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