In this paper, we presented an SOC based HW/SW co-design architecture for multi-standard audio decoding. It is developed to support the audio standards of AAC LC profile, Dolby AC3, Ogg Vorbis, MPEG-1 Layer 3 (MP3) and Windows Media Audio (WMA). A VLSI reconfigurable filterbank based on CORDIC algorithm is developed to accelerate the multistandard decoding process. We designed and implemented an SOC platform to verify the filterbank as an IP core. Experimental result shows that the architecture is able to perform real-time audio decoding at low frequency (typically 10.6MHz for AAC and 11.3MHz for MP3) and the implementation cost is low (44.3k gates, 34k bytes RAM and 45k bytes data ROM for 5 audio standards). The architecture is also flexible for extending support of new formats and standards.
|ホスト出版物のタイトル||2007 IEEE Asian Solid-State Circuits Conference, A-SSCC|
|出版ステータス||Published - 2007|
|イベント||2007 IEEE Asian Solid-State Circuits Conference, A-SSCC - Jeju|
継続期間: 2007 11月 12 → 2007 11月 14
|Other||2007 IEEE Asian Solid-State Circuits Conference, A-SSCC|
|Period||07/11/12 → 07/11/14|
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