CIRCUIT DESIGN OF DYNAMIC MOS RAM WITH CONSIDERATION OF SOFT ERROR.

Yasuji Nagayama; Masaki Kumanoya; Michihiro Yamada; Tsutomu Yoshihara; Makoto Taniguchi

CIRCUIT DESIGN OF DYNAMIC MOS RAM WITH CONSIDERATION OF SOFT ERROR.

Yasuji Nagayama^*, Masaki Kumanoya, Michihiro Yamada, Tsutomu Yoshihara, Makoto Taniguchi

^*この研究の対応する著者

研究成果: Article › 査読

抄録

Dynamic MOS RAMs (MOS (D) RAMs) have been developed according to scaling relationships. But it is necessary to correct the scaling relationships because of soft error. In this paper, a modified scaling law is described based on the assumption that the soft error becomes the governing condition of the scaling law. In addition, a new device structure and circuit configuration are proposed to realize high-speed, low soft error rate and low power consumption.

本文言語	English
ページ（範囲）	92-101
ページ数	10
ジャーナル	Electronics & communications in Japan
巻	65
号	7
出版ステータス	Published - 1983 7月
外部発表	はい

ASJC Scopus subject areas

工学（全般）

他のファイルとリンク

引用スタイル

@article{52be6900f6444809ad0b1c6b469e84f6,

title = "CIRCUIT DESIGN OF DYNAMIC MOS RAM WITH CONSIDERATION OF SOFT ERROR.",

abstract = "Dynamic MOS RAMs (MOS (D) RAMs) have been developed according to scaling relationships. But it is necessary to correct the scaling relationships because of soft error. In this paper, a modified scaling law is described based on the assumption that the soft error becomes the governing condition of the scaling law. In addition, a new device structure and circuit configuration are proposed to realize high-speed, low soft error rate and low power consumption.",

author = "Yasuji Nagayama and Masaki Kumanoya and Michihiro Yamada and Tsutomu Yoshihara and Makoto Taniguchi",

year = "1983",

month = jul,

language = "English",

volume = "65",

pages = "92--101",

journal = "Electronics & communications in Japan",

issn = "0424-8368",

publisher = "Scripta Pub Co.",

number = "7",

}

TY - JOUR

T1 - CIRCUIT DESIGN OF DYNAMIC MOS RAM WITH CONSIDERATION OF SOFT ERROR.

AU - Nagayama, Yasuji

AU - Kumanoya, Masaki

AU - Yamada, Michihiro

AU - Yoshihara, Tsutomu

AU - Taniguchi, Makoto

PY - 1983/7

Y1 - 1983/7

N2 - Dynamic MOS RAMs (MOS (D) RAMs) have been developed according to scaling relationships. But it is necessary to correct the scaling relationships because of soft error. In this paper, a modified scaling law is described based on the assumption that the soft error becomes the governing condition of the scaling law. In addition, a new device structure and circuit configuration are proposed to realize high-speed, low soft error rate and low power consumption.

AB - Dynamic MOS RAMs (MOS (D) RAMs) have been developed according to scaling relationships. But it is necessary to correct the scaling relationships because of soft error. In this paper, a modified scaling law is described based on the assumption that the soft error becomes the governing condition of the scaling law. In addition, a new device structure and circuit configuration are proposed to realize high-speed, low soft error rate and low power consumption.

UR - http://www.scopus.com/inward/record.url?scp=0020780751&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0020780751&partnerID=8YFLogxK

M3 - Article

AN - SCOPUS:0020780751

SN - 0424-8368

VL - 65

SP - 92

EP - 101

JO - Electronics & communications in Japan

JF - Electronics & communications in Japan

IS - 7

ER -

CIRCUIT DESIGN OF DYNAMIC MOS RAM WITH CONSIDERATION OF SOFT ERROR.

抄録

ASJC Scopus subject areas

他のファイルとリンク

フィンガープリント

引用スタイル