CIRCUIT DESIGN OF LARGE SCALE DYNAMIC MOS RAM WITH SCALING RELATIONSHIPS.

YASUJI NAGAYAMA; TSUTOMU YOSHIHARA; TAKAO NAKANO; YOSHIMI GAMOU

CIRCUIT DESIGN OF LARGE SCALE DYNAMIC MOS RAM WITH SCALING RELATIONSHIPS.

YASUJI NAGAYAMA^*, TSUTOMU YOSHIHARA, TAKAO NAKANO, YOSHIMI GAMOU

^*この研究の対応する著者

研究成果: Article › 査読

抄録

THE PAPER DEALS WITH A UNIFIED APPROACH TO FABRICATION, DEVICE AND CIRCUIT TECHNIQUES OF THE LSI DYNAMIC MOS RAM, A MEMORY ELEMENT FOR INFORMATION PROCESSING DEVICES. THE ANALYSISIS PRESENTED OF THE SENSITIVITY OF A DYNAMIC-TYPE SENSE CIRCUIT USING A SINGLE TRANSISTOR IN A MEMORY CELL, INCLUDING THE VOLTAGE READ OUT FROM THE MEMORY CELL AND THE COEFFICIENTM DEFINING ITS OPERATING REGION TO CLARIFY DESIGN GUIDELINES AND THE CONDITION FOR STABLE OPERATION OF A LARGE-SCALE RAM SENSE CIRCUIT.

本文言語	English
ページ（範囲）	82-90
ページ数	9
ジャーナル	Electron Commun Jpn
巻	V 64
号	N 2
出版ステータス	Published - 1981 2月
外部発表	はい

ASJC Scopus subject areas

工学（全般）

他のファイルとリンク

引用スタイル

@article{37ab7cc1eeeb4f1b942582446120ef57,

title = "CIRCUIT DESIGN OF LARGE SCALE DYNAMIC MOS RAM WITH SCALING RELATIONSHIPS.",

abstract = "THE PAPER DEALS WITH A UNIFIED APPROACH TO FABRICATION, DEVICE AND CIRCUIT TECHNIQUES OF THE LSI DYNAMIC MOS RAM, A MEMORY ELEMENT FOR INFORMATION PROCESSING DEVICES. THE ANALYSISIS PRESENTED OF THE SENSITIVITY OF A DYNAMIC-TYPE SENSE CIRCUIT USING A SINGLE TRANSISTOR IN A MEMORY CELL, INCLUDING THE VOLTAGE READ OUT FROM THE MEMORY CELL AND THE COEFFICIENTM DEFINING ITS OPERATING REGION TO CLARIFY DESIGN GUIDELINES AND THE CONDITION FOR STABLE OPERATION OF A LARGE-SCALE RAM SENSE CIRCUIT.",

author = "YASUJI NAGAYAMA and TSUTOMU YOSHIHARA and TAKAO NAKANO and YOSHIMI GAMOU",

year = "1981",

month = feb,

language = "English",

volume = "V 64",

pages = "82--90",

journal = "Electronics and Communications in Japan",

issn = "0424-8368",

publisher = "Scripta Pub Co.",

number = "N 2",

}

TY - JOUR

T1 - CIRCUIT DESIGN OF LARGE SCALE DYNAMIC MOS RAM WITH SCALING RELATIONSHIPS.

AU - NAGAYAMA, YASUJI

AU - YOSHIHARA, TSUTOMU

AU - NAKANO, TAKAO

AU - GAMOU, YOSHIMI

PY - 1981/2

Y1 - 1981/2

N2 - THE PAPER DEALS WITH A UNIFIED APPROACH TO FABRICATION, DEVICE AND CIRCUIT TECHNIQUES OF THE LSI DYNAMIC MOS RAM, A MEMORY ELEMENT FOR INFORMATION PROCESSING DEVICES. THE ANALYSISIS PRESENTED OF THE SENSITIVITY OF A DYNAMIC-TYPE SENSE CIRCUIT USING A SINGLE TRANSISTOR IN A MEMORY CELL, INCLUDING THE VOLTAGE READ OUT FROM THE MEMORY CELL AND THE COEFFICIENTM DEFINING ITS OPERATING REGION TO CLARIFY DESIGN GUIDELINES AND THE CONDITION FOR STABLE OPERATION OF A LARGE-SCALE RAM SENSE CIRCUIT.

AB - THE PAPER DEALS WITH A UNIFIED APPROACH TO FABRICATION, DEVICE AND CIRCUIT TECHNIQUES OF THE LSI DYNAMIC MOS RAM, A MEMORY ELEMENT FOR INFORMATION PROCESSING DEVICES. THE ANALYSISIS PRESENTED OF THE SENSITIVITY OF A DYNAMIC-TYPE SENSE CIRCUIT USING A SINGLE TRANSISTOR IN A MEMORY CELL, INCLUDING THE VOLTAGE READ OUT FROM THE MEMORY CELL AND THE COEFFICIENTM DEFINING ITS OPERATING REGION TO CLARIFY DESIGN GUIDELINES AND THE CONDITION FOR STABLE OPERATION OF A LARGE-SCALE RAM SENSE CIRCUIT.

UR - http://www.scopus.com/inward/record.url?scp=0019524494&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0019524494&partnerID=8YFLogxK

M3 - Article

AN - SCOPUS:0019524494

SN - 0424-8368

VL - V 64

SP - 82

EP - 90

JO - Electronics and Communications in Japan

JF - Electronics and Communications in Japan

IS - N 2

ER -

CIRCUIT DESIGN OF LARGE SCALE DYNAMIC MOS RAM WITH SCALING RELATIONSHIPS.

抄録

ASJC Scopus subject areas

他のファイルとリンク

フィンガープリント

引用スタイル