Design and optimization of hybrid decoupling scheme for charge pump circuit in non-volatile memory application

Mengshu Huang; Leona Okamura; Tsutomu Yoshihara

doi:10.1109/SOCDC.2010.5682935

Design and optimization of hybrid decoupling scheme for charge pump circuit in non-volatile memory application

Mengshu Huang^*, Leona Okamura, Tsutomu Yoshihara

^*この研究の対応する著者

研究成果: Conference contribution

抄録

A high area efficiency hybrid decoupling scheme using both passive and active capacitors is designed to suppress the program noise of charge pump in non-volatile memory. Through the decoupling impedance analysis and noise power calculation, an optimized ratio between the passive and active capacitors is obtained to achieve maximum noise suppression performance. The proposed hybrid decoupling charge pump is fabricated in 0.18μm technology with 1V supply voltage. The results show a nearly 20dB noise-suppression-ratio (NSR) to the conventional method and the ripple voltage reduction is 73%. The area overhead is only 2%.

本文言語	English
ホスト出版物のタイトル	2010 International SoC Design Conference, ISOCC 2010
ページ	205-208
ページ数	4
DOI	https://doi.org/10.1109/SOCDC.2010.5682935
出版ステータス	Published - 2010
イベント	2010 International SoC Design Conference, ISOCC 2010 - Incheon 継続期間: 2010 11月 22 → 2010 11月 23

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Other	2010 International SoC Design Conference, ISOCC 2010
City	Incheon
Period	10/11/22 → 10/11/23

ASJC Scopus subject areas

ハードウェアとアーキテクチャ

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10.1109/SOCDC.2010.5682935

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title = "Design and optimization of hybrid decoupling scheme for charge pump circuit in non-volatile memory application",

abstract = "A high area efficiency hybrid decoupling scheme using both passive and active capacitors is designed to suppress the program noise of charge pump in non-volatile memory. Through the decoupling impedance analysis and noise power calculation, an optimized ratio between the passive and active capacitors is obtained to achieve maximum noise suppression performance. The proposed hybrid decoupling charge pump is fabricated in 0.18μm technology with 1V supply voltage. The results show a nearly 20dB noise-suppression-ratio (NSR) to the conventional method and the ripple voltage reduction is 73%. The area overhead is only 2%.",

author = "Mengshu Huang and Leona Okamura and Tsutomu Yoshihara",

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language = "English",

isbn = "9781424486335",

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AU - Huang, Mengshu

AU - Okamura, Leona

AU - Yoshihara, Tsutomu

PY - 2010

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N2 - A high area efficiency hybrid decoupling scheme using both passive and active capacitors is designed to suppress the program noise of charge pump in non-volatile memory. Through the decoupling impedance analysis and noise power calculation, an optimized ratio between the passive and active capacitors is obtained to achieve maximum noise suppression performance. The proposed hybrid decoupling charge pump is fabricated in 0.18μm technology with 1V supply voltage. The results show a nearly 20dB noise-suppression-ratio (NSR) to the conventional method and the ripple voltage reduction is 73%. The area overhead is only 2%.

AB - A high area efficiency hybrid decoupling scheme using both passive and active capacitors is designed to suppress the program noise of charge pump in non-volatile memory. Through the decoupling impedance analysis and noise power calculation, an optimized ratio between the passive and active capacitors is obtained to achieve maximum noise suppression performance. The proposed hybrid decoupling charge pump is fabricated in 0.18μm technology with 1V supply voltage. The results show a nearly 20dB noise-suppression-ratio (NSR) to the conventional method and the ripple voltage reduction is 73%. The area overhead is only 2%.

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BT - 2010 International SoC Design Conference, ISOCC 2010

T2 - 2010 International SoC Design Conference, ISOCC 2010

Y2 - 22 November 2010 through 23 November 2010

ER -

Design and optimization of hybrid decoupling scheme for charge pump circuit in non-volatile memory application

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